arch-arm: Fix ArmKVM build

BaseInterrupts don't have a checkRaw method.
This was breaking gem5 compilation on a Arm machine

Change-Id: I8717b1bcf64ed14e8a0f63a9dcaca6041dbea4d3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25431
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index 80576a25a5576dd1f1060e95cf6c9c4914c60e53..24f7be8b2c3684bb43dec5b097e3a3b2e0bcd372 100644 (file)
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -45,6 +45,7 @@
 #include <cerrno>
 #include <memory>
 
+#include "arch/arm/interrupts.hh"
 #include "arch/registers.hh"
 #include "cpu/kvm/base.hh"
 #include "debug/Kvm.hh"
@@ -270,8 +271,9 @@ ArmKvmCPU::startup()
 Tick
 ArmKvmCPU::kvmRun(Tick ticks)
 {
-    bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
-    bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
+    auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
+    const bool simFIQ(interrupt->checkRaw(INT_FIQ));
+    const bool simIRQ(interrupt->checkRaw(INT_IRQ));
 
     if (fiqAsserted != simFIQ) {
         fiqAsserted = simFIQ;

diff --git a/src/arch/arm/kvm/base_cpu.cc b/src/arch/arm/kvm/base_cpu.cc
index 765965092d4b553d278900384eee15655a646dcd..c99e853a3a7f75890d0580dfac41f10241264a95 100644 (file)
--- a/src/arch/arm/kvm/base_cpu.cc
+++ b/src/arch/arm/kvm/base_cpu.cc
@@ -41,6 +41,7 @@
 
 #include <linux/kvm.h>
 
+#include "arch/arm/interrupts.hh"
 #include "debug/KvmInt.hh"
 #include "params/BaseArmKvmCPU.hh"
 
@@ -88,8 +89,9 @@ BaseArmKvmCPU::startup()
 Tick
 BaseArmKvmCPU::kvmRun(Tick ticks)
 {
-    const bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
-    const bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
+    auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
+    const bool simFIQ(interrupt->checkRaw(INT_FIQ));
+    const bool simIRQ(interrupt->checkRaw(INT_IRQ));
 
     if (!vm.hasKernelIRQChip()) {
         if (fiqAsserted != simFIQ) {