return r;
}
+static void si_llvm_build_ret(struct si_shader_context *ctx, LLVMValueRef ret)
+{
+ if (LLVMGetTypeKind(LLVMTypeOf(ret)) == LLVMVoidTypeKind)
+ LLVMBuildRetVoid(ctx->radeon_bld.gallivm.builder);
+ else
+ LLVMBuildRet(ctx->radeon_bld.gallivm.builder, ret);
+}
+
/* Generate code for the hardware VS shader stage to go with a geometry shader */
static int si_generate_gs_copy_shader(struct si_screen *sscreen,
struct si_shader_context *ctx,
si_llvm_export_vs(bld_base, outputs, gsinfo->num_outputs);
- LLVMBuildRet(gallivm->builder, ctx->return_value);
+ LLVMBuildRetVoid(gallivm->builder);
/* Dump LLVM IR before any optimization passes */
if (sscreen->b.debug_flags & DBG_PREOPT_IR &&
goto out;
}
- LLVMBuildRet(bld_base->base.gallivm->builder, ctx.return_value);
+ si_llvm_build_ret(&ctx, ctx.return_value);
mod = bld_base->base.gallivm->module;
/* Dump LLVM IR before any optimization passes */
}
/* Compile. */
- LLVMBuildRet(gallivm->builder, ret);
+ si_llvm_build_ret(&ctx, ret);
radeon_llvm_finalize_module(&ctx.radeon_bld);
if (si_compile_llvm(sscreen, &out->binary, &out->config, tm,
}
/* Compile. */
- LLVMBuildRet(gallivm->builder, ctx.return_value);
+ LLVMBuildRetVoid(gallivm->builder);
radeon_llvm_finalize_module(&ctx.radeon_bld);
if (si_compile_llvm(sscreen, &out->binary, &out->config, tm,
LLVMGetParam(func, last_sgpr + 3));
/* Compile. */
- LLVMBuildRet(gallivm->builder, ctx.return_value);
+ LLVMBuildRetVoid(gallivm->builder);
radeon_llvm_finalize_module(&ctx.radeon_bld);
if (si_compile_llvm(sscreen, &out->binary, &out->config, tm,
}
/* Compile. */
- LLVMBuildRet(gallivm->builder, ret);
+ si_llvm_build_ret(&ctx, ret);
radeon_llvm_finalize_module(&ctx.radeon_bld);
if (si_compile_llvm(sscreen, &out->binary, &out->config, tm,