#define ELTS_BUFSZ(nr) (12 + nr * 2)
#define VBUF_BUFSZ (3 * sizeof(int))
-/* Ensure that a minimum amount of space is available in the command buffer.
- * This is used to ensure atomicity of state updates with the rendering requests
- * that rely on them.
- *
- * An alternative would be to implement a "soft lock" such that when the buffer
- * wraps at an inopportune time, we grab the lock, flush the current buffer,
- * and hang on to the lock until the critical section is finished and we flush
- * the buffer again and unlock.
- */
-#if 0
-static INLINE void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
-{
- if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
- rcommonFlushCmdBuf( rmesa, __FUNCTION__ );
- assert( bytes <= R200_CMD_BUF_SZ );
-}
-
-/* Alloc space in the command buffer
- */
-static INLINE char *r200AllocCmdBuf( r200ContextPtr rmesa,
- int bytes, const char *where )
-{
- char * head;
-
- if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
- r200FlushCmdBuf( rmesa, where );
-
- head = rmesa->store.cmd_buf + rmesa->store.cmd_used;
- rmesa->store.cmd_used += bytes;
- assert( rmesa->store.cmd_used <= R200_CMD_BUF_SZ );
- return head;
-}
-#endif
-
static inline uint32_t cmdpacket3(int cmd_type)
{
drm_radeon_cmd_header_t cmd;
#define RADEON_IDLE_RETRY 16
-static int radeonFlushCmdBufLocked( r100ContextPtr rmesa,
- const char * caller );
static void print_state_atom( struct radeon_state_atom *state )
{
saved_store = rmesa->store;
rmesa->radeon.dma.nr_released_bufs = 0;
rmesa->store = rmesa->backup_store;
- radeonFlushCmdBufLocked( rmesa, __FUNCTION__ );
+ rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
rmesa->radeon.dma.nr_released_bufs = nr_released_bufs;
rmesa->store = saved_store;
}
GLuint primitive,
GLuint min_nr )
{
- drm_radeon_cmd_header_t *cmd;
GLushort *retval;
if (RADEON_DEBUG & DEBUG_IOCTL)
retval = rmesa->tcl.elt_dma_bo->ptr + rmesa->tcl.elt_dma_offset;
if (RADEON_DEBUG & DEBUG_PRIMS)
- fprintf(stderr, "%s: header 0x%x vfmt 0x%x prim %x \n",
+ fprintf(stderr, "%s: header vfmt 0x%x prim %x \n",
__FUNCTION__,
- cmd[1].i, vertex_format, primitive);
+ vertex_format, primitive);
assert(!rmesa->radeon.dma.flush);
rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
rmesa->radeon.dma.flush = radeonFlushElts;
- rmesa->store.elts_start = ((char *)cmd) - rmesa->store.cmd_buf;
+ // rmesa->store.elts_start = ((char *)cmd) - rmesa->store.cmd_buf;
return retval;
}
#endif
}
+
+
/* using already shifted color_fmt! */
void radeonEmitBlit( r100ContextPtr rmesa, /* FIXME: which drmMinor is required? */
GLuint color_fmt,
}
/* Send current state to the hardware */
- radeonFlushCmdBufLocked( rmesa, __FUNCTION__ );
+ rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
for ( i = 0 ; i < dPriv->numClipRects ; ) {
GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );