coolrunner2: Add extraction for TFFs

diff --git a/techlibs/coolrunner2/Makefile.inc b/techlibs/coolrunner2/Makefile.inc
index 96bbb0f4777bc71e2b79dfcb698e4079de8d9aa7..d62c9960c7039d150b51902b655ff94e2954ca11 100644 (file)
--- a/techlibs/coolrunner2/Makefile.inc
+++ b/techlibs/coolrunner2/Makefile.inc
@@ -4,4 +4,5 @@ OBJS += techlibs/coolrunner2/coolrunner2_sop.o
 
 $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_latch.v))
 $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_sim.v))
+$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/tff_extract.v))
 $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/xc2_dff.lib))

diff --git a/techlibs/coolrunner2/synth_coolrunner2.cc b/techlibs/coolrunner2/synth_coolrunner2.cc
index 18328262987b7d1ca29623089a467d4134930697..5d9e3cc90d0b012c2ca098de3703cfdd51d146bc 100644 (file)
--- a/techlibs/coolrunner2/synth_coolrunner2.cc
+++ b/techlibs/coolrunner2/synth_coolrunner2.cc
@@ -149,6 +149,16 @@ struct SynthCoolrunner2Pass : public ScriptPass
                        run("dfflibmap -prepare -liberty +/coolrunner2/xc2_dff.lib");
                }
 
+               if (check_label("map_tff"))
+               {
+                       // This is quite hacky. By telling abc that it can only use AND and XOR gates, abc will try and use XOR
+                       // gates "whenever possible." This will hopefully cause toggle flip-flop structures to turn into an XOR
+                       // connected to a D flip-flop. We then match on these and convert them into XC2 TFF cells.
+                       run("abc -g AND,XOR");
+                       run("clean");
+                       run("extract -map +/coolrunner2/tff_extract.v");
+               }
+
                if (check_label("map_pla"))
                {
                        run("abc -sop -I 40 -P 56");
@@ -160,6 +170,8 @@ struct SynthCoolrunner2Pass : public ScriptPass
                        run("dfflibmap -liberty +/coolrunner2/xc2_dff.lib");
                        run("dffinit -ff FDCP Q INIT");
                        run("dffinit -ff FDCP_N Q INIT");
+                       run("dffinit -ff FTCP Q INIT");
+                       run("dffinit -ff FTCP_N Q INIT");
                        run("dffinit -ff LDCP Q INIT");
                        run("dffinit -ff LDCP_N Q INIT");
                        run("coolrunner2_sop");

diff --git a/techlibs/coolrunner2/tff_extract.v b/techlibs/coolrunner2/tff_extract.v
new file mode 100644 (file)
index 0000000..b4237dd
--- /dev/null
+++ b/techlibs/coolrunner2/tff_extract.v
@@ -0,0 +1,41 @@
+module FTCP (C, PRE, CLR, T, Q);
+       input C, PRE, CLR, T;
+       output wire Q;
+
+       wire xorout;
+
+       $_XOR_ xorgate (
+               .A(T),
+               .B(Q),
+               .Y(xorout),
+       );
+
+       $_DFFSR_PPP_ dff (
+               .C(C),
+               .D(xorout),
+               .Q(Q),
+               .S(PRE),
+               .R(CLR),
+       );
+endmodule
+
+module FTCP_N (C, PRE, CLR, T, Q);
+       input C, PRE, CLR, T;
+       output wire Q;
+
+       wire xorout;
+
+       $_XOR_ xorgate (
+               .A(T),
+               .B(Q),
+               .Y(xorout),
+       );
+
+       $_DFFSR_NPP_ dff (
+               .C(C),
+               .D(xorout),
+               .Q(Q),
+               .S(PRE),
+               .R(CLR),
+       );
+endmodule