Force soft float in ARMv6-M and ARMv8-M Baseline options
authorThomas Preud'homme <thomas.preudhomme@arm.com>
Wed, 30 Nov 2016 12:30:52 +0000 (12:30 +0000)
committerThomas Preud'homme <thopre01@gcc.gnu.org>
Wed, 30 Nov 2016 12:30:52 +0000 (12:30 +0000)
2016-11-29  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * lib/target-supports.exp (add_options_for_arm_arch_v6m): Add
    -mfloat-abi=soft option.
    (add_options_for_arm_arch_v8m_base): Likewise.  Reindent containing
    foreach loop.

From-SVN: r243013

gcc/testsuite/ChangeLog
gcc/testsuite/lib/target-supports.exp

index d2d80d26e515cca14957eefe01a6bf6375023ff7..502d525e77e451b92c9d036452002b5f7be52687 100644 (file)
@@ -1,3 +1,10 @@
+2016-11-30  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * lib/target-supports.exp (add_options_for_arm_arch_v6m): Add
+       -mfloat-abi=soft option.
+       (add_options_for_arm_arch_v8m_base): Likewise.  Reindent containing
+       foreach loop.
+
 2016-11-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        PR target/78362
index ace080e9c471f8ce66ae76294747f57221d7e03b..798cf6bb54540843280885af9775d71d6af8fc72 100644 (file)
@@ -3728,25 +3728,26 @@ proc check_effective_target_arm_fp16_hw { } {
 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
 #        /* { dg-add-options arm_arch_v5 } */
 #       /* { dg-require-effective-target arm_arch_v5_multilib } */
-foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
-                                    v4t "-march=armv4t" __ARM_ARCH_4T__
-                                    v5 "-march=armv5 -marm" __ARM_ARCH_5__
-                                    v5t "-march=armv5t" __ARM_ARCH_5T__
-                                    v5te "-march=armv5te" __ARM_ARCH_5TE__
-                                    v6 "-march=armv6" __ARM_ARCH_6__
-                                    v6k "-march=armv6k" __ARM_ARCH_6K__
-                                    v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
-                                    v6z "-march=armv6z" __ARM_ARCH_6Z__
-                                    v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
-                                    v7a "-march=armv7-a" __ARM_ARCH_7A__
-                                    v7r "-march=armv7-r" __ARM_ARCH_7R__
-                                    v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
-                                    v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
-                                    v8a "-march=armv8-a" __ARM_ARCH_8A__
-                                    v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
-                                    v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
-                                    v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__
-                                    v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
+foreach { armfunc armflag armdef } {
+       v4 "-march=armv4 -marm" __ARM_ARCH_4__
+       v4t "-march=armv4t" __ARM_ARCH_4T__
+       v5 "-march=armv5 -marm" __ARM_ARCH_5__
+       v5t "-march=armv5t" __ARM_ARCH_5T__
+       v5te "-march=armv5te" __ARM_ARCH_5TE__
+       v6 "-march=armv6" __ARM_ARCH_6__
+       v6k "-march=armv6k" __ARM_ARCH_6K__
+       v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
+       v6z "-march=armv6z" __ARM_ARCH_6Z__
+       v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
+       v7a "-march=armv7-a" __ARM_ARCH_7A__
+       v7r "-march=armv7-r" __ARM_ARCH_7R__
+       v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
+       v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
+       v8a "-march=armv8-a" __ARM_ARCH_8A__
+       v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
+       v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
+       v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__
+       v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
     eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
        proc check_effective_target_arm_arch_FUNC_ok { } {
            if { [ string match "*-marm*" "FLAG" ] &&