[AArch64] Fix SIMD predicate

Fix the predicate "aarch64_simd_reg_or_zero" to correctly validate the
"Y" constraint (scalar FP 0.0 immediate).

	* gcc/config/aarch64/predicates.md (aarch64_simd_reg_or_zero):
	Add the "const_double" to the list of operand constraints.

From-SVN: r234685

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 81d8879747275515426b75b1a350d4f1ea64b172..0d32ed68ef2fb20a1337539c41b49ce4ec3760ca 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2016-03-31  Evandro Menezes  <e.menezes@samsung.com>
+
+       Fix the predicate "aarch64_simd_reg_or_zero" to correctly validate
+       the "Y" constraint (scalar FP 0.0 immediate).
+
+       * gcc/config/aarch64/predicates.md (aarch64_simd_reg_or_zero):
+       Add the "const_double" to the list of operand constraints.
+
 2016-04-01  Jakub Jelinek  <jakub@redhat.com>
 
        PR rtl-optimization/70467

diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 11868278c3d0a1887c2065568f890c3eb8ff7f0b..8f2726d4483f79c6b2056eaa99519dad4db4c2a3 100644 (file)
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -302,7 +302,7 @@
 })
 
 (define_predicate "aarch64_simd_reg_or_zero"
-  (and (match_code "reg,subreg,const_int,const_vector")
+  (and (match_code "reg,subreg,const_int,const_double,const_vector")
        (ior (match_operand 0 "register_operand")
            (ior (match_test "op == const0_rtx")
                 (match_test "aarch64_simd_imm_zero_p (op, mode)")))))