i386.md (*testqi_ext_3): Merge insn pattern and corresponding splitter to define_insn...

	* config/i386/i386.md (*testqi_ext_3): Merge insn pattern and
	corresponding splitter to define_insn_and_split.  Use wi::shifted_mask
	helper function to calculate mask.

From-SVN: r243977

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 629c5509a92442bfdba5ebf08c43b7f95611255f..ead35e3688f54a159a7fe8bcd92fc718e850518c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-12-30  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*testqi_ext_3): Merge insn pattern and
+       corresponding splitter to define_insn_and_split.  Use wi::shifted_mask
+       helper function to calculate mask.
+
 2016-12-30  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/predicates.md (ext_register_operand): Do not reject

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b1a8814b1f91b768a71016c3029ee3273c093d70..6546e20f17cc0958b3baf52776c1930eaca30ffd 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7924,42 +7924,33 @@
    (set_attr "mode" "QI")])
 
 ;; Combine likes to form bit extractions for some tests.  Humor it.
-(define_insn "*testqi_ext_3"
-  [(set (reg FLAGS_REG)
-       (compare (zero_extract:SWI248
-                  (match_operand 0 "nonimmediate_operand" "rm")
-                  (match_operand 1 "const_int_operand" "n")
-                  (match_operand 2 "const_int_operand" "n"))
-                (const_int 0)))]
-  "ix86_match_ccmode (insn, CCNOmode)
-   && ((TARGET_64BIT && GET_MODE (operands[0]) == DImode)
-       || GET_MODE (operands[0]) == SImode
-       || GET_MODE (operands[0]) == HImode
-       || GET_MODE (operands[0]) == QImode)
-   /* Ensure that resulting mask is zero or sign extended operand.  */
-   && INTVAL (operands[2]) >= 0
-   && ((INTVAL (operands[1]) > 0
-       && INTVAL (operands[1]) + INTVAL (operands[2]) <= 32)
-       || (<MODE>mode == DImode
-          && INTVAL (operands[1]) > 32
-          && INTVAL (operands[1]) + INTVAL (operands[2]) == 64))"
-  "#")
-
-(define_split
+(define_insn_and_split "*testqi_ext_3"
   [(set (match_operand 0 "flags_reg_operand")
         (match_operator 1 "compare_operator"
-         [(zero_extract
-            (match_operand 2 "nonimmediate_operand")
-            (match_operand 3 "const_int_operand")
-            (match_operand 4 "const_int_operand"))
+         [(zero_extract:SWI248
+            (match_operand 2 "nonimmediate_operand" "rm")
+            (match_operand 3 "const_int_operand" "n")
+            (match_operand 4 "const_int_operand" "n"))
           (const_int 0)]))]
-  "ix86_match_ccmode (insn, CCNOmode)"
+  "ix86_match_ccmode (insn, CCNOmode)
+   && ((TARGET_64BIT && GET_MODE (operands[2]) == DImode)
+       || GET_MODE (operands[2]) == SImode
+       || GET_MODE (operands[2]) == HImode
+       || GET_MODE (operands[2]) == QImode)
+   /* Ensure that resulting mask is zero or sign extended operand.  */
+   && INTVAL (operands[4]) >= 0
+   && ((INTVAL (operands[3]) > 0
+       && INTVAL (operands[3]) + INTVAL (operands[4]) <= 32)
+       || (<MODE>mode == DImode
+          && INTVAL (operands[3]) > 32
+          && INTVAL (operands[3]) + INTVAL (operands[4]) == 64))"
+  "#"
+  "&& 1"
   [(set (match_dup 0) (match_op_dup 1 [(match_dup 2) (const_int 0)]))]
 {
   rtx val = operands[2];
   HOST_WIDE_INT len = INTVAL (operands[3]);
   HOST_WIDE_INT pos = INTVAL (operands[4]);
-  HOST_WIDE_INT mask;
   machine_mode mode, submode;
 
   mode = GET_MODE (val);
@@ -7990,13 +7981,10 @@
       val = gen_lowpart (QImode, val);
     }
 
-  if (len == HOST_BITS_PER_WIDE_INT)
-    mask = -1;
-  else
-    mask = (HOST_WIDE_INT_1 << len) - 1;
-  mask <<= pos;
+  wide_int mask
+    = wi::shifted_mask (pos, len, false, GET_MODE_PRECISION (mode));
 
-  operands[2] = gen_rtx_AND (mode, val, gen_int_mode (mask, mode));
+  operands[2] = gen_rtx_AND (mode, val, immed_wide_int_const (mask, mode));
 })
 
 ;; Convert HImode/SImode test instructions with immediate to QImode ones.