Merge zizzer:/bk/newmem/

into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 17d6c49ee15af5d192dedf82871159219d4277cd

diff --cc src/cpu/base_dyn_inst.hh
Simple merge

diff --cc src/cpu/o3/alpha/dyn_inst.hh
index 4e2ce63dfe12a1d3c3fd21abb29c069f6688772c,49cc5a201d2bf5268d5bb63c942f8ba6fa229467..c340a806a4f549bb72772a1746cad4e40485f7f7
--- 1/src/cpu/o3/alpha/dyn_inst.hh
--- 2/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@@ -147,65 -163,110 +147,68 @@@ class AlphaDynInst : public BaseDynInst
      // storage (which is pretty hard to imagine they would have reason
      // to do).
  
-     uint64_t readIntReg(const StaticInst *si, int idx)
+     uint64_t readIntRegOperand(const StaticInst *si, int idx)
      {
 -        return this->cpu->readIntReg(_srcRegIdx[idx]);
 +        return this->cpu->readIntReg(this->_srcRegIdx[idx]);
      }
  
-     FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+     FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
      {
 -        return this->cpu->readFloatReg(_srcRegIdx[idx], width);
 +        return this->cpu->readFloatReg(this->_srcRegIdx[idx], width);
      }
  
-     FloatReg readFloatReg(const StaticInst *si, int idx)
+     FloatReg readFloatRegOperand(const StaticInst *si, int idx)
      {
 -        return this->cpu->readFloatReg(_srcRegIdx[idx]);
 +        return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
      }
  
-     FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                          int width)
      {
 -        return this->cpu->readFloatRegBits(_srcRegIdx[idx], width);
 +        return this->cpu->readFloatRegBits(this->_srcRegIdx[idx], width);
      }
  
-     FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
      {
 -        return this->cpu->readFloatRegBits(_srcRegIdx[idx]);
 +        return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
      }
  
      /** @todo: Make results into arrays so they can handle multiple dest
       *  registers.
       */
-     void setIntReg(const StaticInst *si, int idx, uint64_t val)
+     void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
      {
 -        this->cpu->setIntReg(_destRegIdx[idx], val);
 +        this->cpu->setIntReg(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setIntReg(si, idx, val);
+         BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
      }
  
-     void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                             int width)
      {
 -        this->cpu->setFloatReg(_destRegIdx[idx], val, width);
 +        this->cpu->setFloatReg(this->_destRegIdx[idx], val, width);
-         BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
+         BaseDynInst<Impl>::setFloatRegOperand(si, idx, val, width);
      }
  
-     void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
      {
 -        this->cpu->setFloatReg(_destRegIdx[idx], val);
 +        this->cpu->setFloatReg(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setFloatReg(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
      }
  
-     void setFloatRegBits(const StaticInst *si, int idx,
-             FloatRegBits val, int width)
+     void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                 FloatRegBits val, int width)
      {
 -        this->cpu->setFloatRegBits(_destRegIdx[idx], val, width);
 +        this->cpu->setFloatRegBits(this->_destRegIdx[idx], val, width);
-         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
      }
  
-     void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+     void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                 FloatRegBits val)
      {
 -        this->cpu->setFloatRegBits(_destRegIdx[idx], val);
 +        this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
      }
  
 -    /** Returns the physical register index of the i'th destination
 -     *  register.
 -     */
 -    PhysRegIndex renamedDestRegIdx(int idx) const
 -    {
 -        return _destRegIdx[idx];
 -    }
 -
 -    /** Returns the physical register index of the i'th source register. */
 -    PhysRegIndex renamedSrcRegIdx(int idx) const
 -    {
 -        return _srcRegIdx[idx];
 -    }
 -
 -    /** Returns the physical register index of the previous physical register
 -     *  that remapped to the same logical register index.
 -     */
 -    PhysRegIndex prevDestRegIdx(int idx) const
 -    {
 -        return _prevDestRegIdx[idx];
 -    }
 -
 -    /** Renames a destination register to a physical register.  Also records
 -     *  the previous physical register that the logical register mapped to.
 -     */
 -    void renameDestReg(int idx,
 -                       PhysRegIndex renamed_dest,
 -                       PhysRegIndex previous_rename)
 -    {
 -        _destRegIdx[idx] = renamed_dest;
 -        _prevDestRegIdx[idx] = previous_rename;
 -    }
 -
 -    /** Renames a source logical register to the physical register which
 -     *  has/will produce that logical register's result.
 -     *  @todo: add in whether or not the source register is ready.
 -     */
 -    void renameSrcReg(int idx, PhysRegIndex renamed_src)
 -    {
 -        _srcRegIdx[idx] = renamed_src;
 -    }
 -
    public:
      /** Calculates EA part of a memory instruction. Currently unused,
       * though it may be useful in the future if we want to split

diff --cc src/cpu/o3/commit_impl.hh
Simple merge

diff --cc src/cpu/o3/fetch_impl.hh
Simple merge

diff --cc src/cpu/o3/lsq_unit_impl.hh
Simple merge

diff --cc src/cpu/o3/mips/dyn_inst.hh
index bf82168ce06644fbb2c53104534151ef1cb023cc,833371e00ef584e54a18d3e440bc3277bf569a7c..009a080128228ebca2b9647e260f8b68c1f13fd4
--- 1/src/cpu/o3/mips/dyn_inst.hh
--- 2/src/cpu/o3/mips/dyn_inst.hh
+++ b/src/cpu/o3/mips/dyn_inst.hh
@@@ -136,65 -156,110 +136,68 @@@ class MipsDynInst : public BaseDynInst<
      // storage (which is pretty hard to imagine they would have reason
      // to do).
  
-     uint64_t readIntReg(const StaticInst *si, int idx)
+     uint64_t readIntRegOperand(const StaticInst *si, int idx)
      {
 -        return this->cpu->readIntReg(_srcRegIdx[idx]);
 +        return this->cpu->readIntReg(this->_srcRegIdx[idx]);
      }
  
-     FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+     FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
      {
 -        return this->cpu->readFloatReg(_srcRegIdx[idx], width);
 +        return this->cpu->readFloatReg(this->_srcRegIdx[idx], width);
      }
  
-     FloatReg readFloatReg(const StaticInst *si, int idx)
+     FloatReg readFloatRegOperand(const StaticInst *si, int idx)
      {
 -        return this->cpu->readFloatReg(_srcRegIdx[idx]);
 +        return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
      }
  
-     FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                          int width)
      {
 -        return this->cpu->readFloatRegBits(_srcRegIdx[idx], width);
 +        return this->cpu->readFloatRegBits(this->_srcRegIdx[idx], width);
      }
  
-     FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
      {
 -        return this->cpu->readFloatRegBits(_srcRegIdx[idx]);
 +        return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
      }
  
      /** @todo: Make results into arrays so they can handle multiple dest
       *  registers.
       */
-     void setIntReg(const StaticInst *si, int idx, uint64_t val)
+     void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
      {
 -        this->cpu->setIntReg(_destRegIdx[idx], val);
 +        this->cpu->setIntReg(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setIntReg(si, idx, val);
+         BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
      }
  
-     void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                             int width)
      {
 -        this->cpu->setFloatReg(_destRegIdx[idx], val, width);
 +        this->cpu->setFloatReg(this->_destRegIdx[idx], val, width);
-         BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
+         BaseDynInst<Impl>::setFloatRegOperand(si, idx, val, width);
      }
  
-     void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
      {
 -        this->cpu->setFloatReg(_destRegIdx[idx], val);
 +        this->cpu->setFloatReg(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setFloatReg(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
      }
  
-     void setFloatRegBits(const StaticInst *si, int idx,
-             FloatRegBits val, int width)
+     void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                 FloatRegBits val, int width)
      {
 -        this->cpu->setFloatRegBits(_destRegIdx[idx], val, width);
 +        this->cpu->setFloatRegBits(this->_destRegIdx[idx], val, width);
-         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
      }
  
-     void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+     void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                 FloatRegBits val)
      {
 -        this->cpu->setFloatRegBits(_destRegIdx[idx], val);
 +        this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
-         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+         BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
      }
  
 -    /** Returns the physical register index of the i'th destination
 -     *  register.
 -     */
 -    PhysRegIndex renamedDestRegIdx(int idx) const
 -    {
 -        return _destRegIdx[idx];
 -    }
 -
 -    /** Returns the physical register index of the i'th source register. */
 -    PhysRegIndex renamedSrcRegIdx(int idx) const
 -    {
 -        return _srcRegIdx[idx];
 -    }
 -
 -    /** Returns the physical register index of the previous physical register
 -     *  that remapped to the same logical register index.
 -     */
 -    PhysRegIndex prevDestRegIdx(int idx) const
 -    {
 -        return _prevDestRegIdx[idx];
 -    }
 -
 -    /** Renames a destination register to a physical register.  Also records
 -     *  the previous physical register that the logical register mapped to.
 -     */
 -    void renameDestReg(int idx,
 -                       PhysRegIndex renamed_dest,
 -                       PhysRegIndex previous_rename)
 -    {
 -        _destRegIdx[idx] = renamed_dest;
 -        _prevDestRegIdx[idx] = previous_rename;
 -    }
 -
 -    /** Renames a source logical register to the physical register which
 -     *  has/will produce that logical register's result.
 -     *  @todo: add in whether or not the source register is ready.
 -     */
 -    void renameSrcReg(int idx, PhysRegIndex renamed_src)
 -    {
 -        _srcRegIdx[idx] = renamed_src;
 -    }
 -
    public:
      /** Calculates EA part of a memory instruction. Currently unused,
       * though it may be useful in the future if we want to split

diff --cc src/cpu/simple_thread.hh
Simple merge