ARM and AArch64 messages
authorAlan Modra <amodra@gmail.com>
Wed, 21 Feb 2018 02:34:48 +0000 (13:04 +1030)
committerAlan Modra <amodra@gmail.com>
Sun, 25 Feb 2018 23:01:52 +0000 (09:31 +1030)
More standarization of error/warning messages.  The ARM backend has
some multi-line error messages, which don't fit particularly well with
the GNU coding standard insistence that error messages shouldn't be
capitalized or have a full-stop.  I've replaced the line breaks with
semicolons.

So for instance the following
  system/path/to/ld: myobject.o: invalid special symbol `foo'.
  system/path/to/ld: It must be a global or weak function symbol.
becomes
  system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol

bfd/
* elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages.
ld/
* testsuite/ld-aarch64/reloc-overflow-bad.d,
* testsuite/ld-arm/attr-merge-9.out,
* testsuite/ld-arm/attr-merge-arch-2.d,
* testsuite/ld-arm/attr-merge-unknown-1.d,
* testsuite/ld-arm/attr-merge-unknown-2.d,
* testsuite/ld-arm/attr-merge-unknown-2r.d,
* testsuite/ld-arm/attr-merge-unknown-3.d,
* testsuite/ld-arm/cmse-implib-errors.out,
* testsuite/ld-arm/cmse-new-earlier-later-implib.out,
* testsuite/ld-arm/cmse-new-implib-no-output.out,
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
* testsuite/ld-arm/cmse-new-implib.out,
* testsuite/ld-arm/cmse-new-wrong-implib.out,
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
* testsuite/ld-arm/group-relocs-alu-bad-2.d,
* testsuite/ld-arm/group-relocs-alu-bad.d,
* testsuite/ld-arm/group-relocs-ldc-bad-2.d,
* testsuite/ld-arm/group-relocs-ldc-bad.d,
* testsuite/ld-arm/group-relocs-ldr-bad-2.d,
* testsuite/ld-arm/group-relocs-ldr-bad.d,
* testsuite/ld-arm/group-relocs-ldrs-bad-2.d,
* testsuite/ld-arm/group-relocs-ldrs-bad.d,
* testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.

28 files changed:
bfd/ChangeLog
bfd/elf32-arm.c
bfd/elfnn-aarch64.c
ld/ChangeLog
ld/testsuite/ld-aarch64/reloc-overflow-bad.d
ld/testsuite/ld-arm/attr-merge-9.out
ld/testsuite/ld-arm/attr-merge-arch-2.d
ld/testsuite/ld-arm/attr-merge-unknown-1.d
ld/testsuite/ld-arm/attr-merge-unknown-2.d
ld/testsuite/ld-arm/attr-merge-unknown-2r.d
ld/testsuite/ld-arm/attr-merge-unknown-3.d
ld/testsuite/ld-arm/cmse-implib-errors.out
ld/testsuite/ld-arm/cmse-new-earlier-later-implib.out
ld/testsuite/ld-arm/cmse-new-implib-no-output.out
ld/testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out
ld/testsuite/ld-arm/cmse-new-implib.out
ld/testsuite/ld-arm/cmse-new-wrong-implib.out
ld/testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out
ld/testsuite/ld-arm/cmse-veneers-wrong-entryfct.out
ld/testsuite/ld-arm/group-relocs-alu-bad-2.d
ld/testsuite/ld-arm/group-relocs-alu-bad.d
ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d
ld/testsuite/ld-arm/group-relocs-ldc-bad.d
ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d
ld/testsuite/ld-arm/group-relocs-ldr-bad.d
ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d
ld/testsuite/ld-arm/group-relocs-ldrs-bad.d
ld/testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d

index 5969c5e811d81c2eae9bee5edeb466d82ae5f620..863980f16936eab905616cac4fb91cbb44c7d333 100644 (file)
@@ -1,3 +1,7 @@
+2018-02-26  Alan Modra  <amodra@gmail.com>
+
+       * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages.
+
 2018-02-26  Alan Modra  <amodra@gmail.com>
 
        * elfxx-mips.c: Standardize error/warning messages.
index b599b1e65cbf7bcec9ab7844321f84411236980b..881f2cf783ef50f79d566c4ea5dc68b845e4f44d 100644 (file)
@@ -4022,7 +4022,7 @@ arm_type_of_stub (struct bfd_link_info *info,
                      (_("%pB(%pA): warning: long branch veneers used in"
                         " section with SHF_ARM_PURECODE section"
                         " attribute is only supported for M-profile"
-                        " targets that implement the movw instruction."),
+                        " targets that implement the movw instruction"),
                       input_bfd, input_sec);
 
                  stub_type = (bfd_link_pic (info) | globals->pic_veneer)
@@ -4056,7 +4056,7 @@ arm_type_of_stub (struct bfd_link_info *info,
                          (_("%pB(%pA): warning: long branch veneers used in"
                             " section with SHF_ARM_PURECODE section"
                             " attribute is only supported for M-profile"
-                            " targets that implement the movw instruction."),
+                            " targets that implement the movw instruction"),
                           input_bfd, input_sec);
 
                      stub_type = (bfd_link_pic (info) | globals->pic_veneer)
@@ -4075,7 +4075,7 @@ arm_type_of_stub (struct bfd_link_info *info,
                  (_("%pB(%pA): warning: long branch veneers used in"
                     " section with SHF_ARM_PURECODE section"
                     " attribute is only supported" " for M-profile"
-                    " targets that implement the movw instruction."),
+                    " targets that implement the movw instruction"),
                   input_bfd, input_sec);
 
              /* Thumb to arm.  */
@@ -4084,9 +4084,9 @@ arm_type_of_stub (struct bfd_link_info *info,
                  && !INTERWORK_FLAG (sym_sec->owner))
                {
                  _bfd_error_handler
-                   (_("%pB(%s): warning: interworking not enabled.\n"
-                      "  first occurrence: %pB: Thumb call to ARM"),
-                    sym_sec->owner, name, input_bfd);
+                   (_("%pB(%s): warning: interworking not enabled;"
+                      " first occurrence: %pB: %s call to %s"),
+                    sym_sec->owner, name, input_bfd, "Thumb", "ARM");
                }
 
              stub_type =
@@ -4127,7 +4127,7 @@ arm_type_of_stub (struct bfd_link_info *info,
          (_("%pB(%pA): warning: long branch veneers used in"
             " section with SHF_ARM_PURECODE section"
             " attribute is only supported for M-profile"
-            " targets that implement the movw instruction."),
+            " targets that implement the movw instruction"),
           input_bfd, input_sec);
       if (branch_type == ST_BRANCH_TO_THUMB)
        {
@@ -4138,9 +4138,9 @@ arm_type_of_stub (struct bfd_link_info *info,
              && !INTERWORK_FLAG (sym_sec->owner))
            {
              _bfd_error_handler
-               (_("%pB(%s): warning: interworking not enabled.\n"
-                  "  first occurrence: %pB: ARM call to Thumb"),
-                sym_sec->owner, name, input_bfd);
+               (_("%pB(%s): warning: interworking not enabled;"
+                  " first occurrence: %pB: %s call to %s"),
+                sym_sec->owner, name, input_bfd, "ARM", "Thumb");
            }
 
          /* We have an extra 2-bytes reach because of
@@ -4412,7 +4412,7 @@ elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
       out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
       if (out_sec == NULL)
        {
-         _bfd_error_handler (_("No address assigned to the veneers output "
+         _bfd_error_handler (_("no address assigned to the veneers output "
                                "section %s"), out_sec_name);
          return NULL;
        }
@@ -5672,8 +5672,8 @@ cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
 
       if (!is_v8m)
        {
-         _bfd_error_handler (_("%pB: Special symbol `%s' only allowed for "
-                               "ARMv8-M architecture or later."),
+         _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
+                               "ARMv8-M architecture or later"),
                              input_bfd, sym_name);
          is_v8m = TRUE; /* Avoid multiple warning.  */
          ret = FALSE;
@@ -5681,10 +5681,9 @@ cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
 
       if (cmse_invalid)
        {
-         _bfd_error_handler (_("%pB: invalid special symbol `%s'."),
+         _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
+                               " a global or weak function symbol"),
                              input_bfd, sym_name);
-         _bfd_error_handler (_("It must be a global or weak function "
-                               "symbol."));
          ret = FALSE;
          if (i < ext_start)
            continue;
@@ -5721,13 +5720,13 @@ cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
          if (hash || j < ext_start)
            {
              _bfd_error_handler
-               (_("%pB: invalid standard symbol `%s'."), input_bfd, sym_name);
-             _bfd_error_handler
-               (_("It must be a global or weak function symbol."));
+               (_("%pB: invalid standard symbol `%s'; it must be "
+                  "a global or weak function symbol"),
+                input_bfd, sym_name);
            }
          else
            _bfd_error_handler
-             (_("%pB: absent standard symbol `%s'."), input_bfd, sym_name);
+             (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
          ret = FALSE;
          if (!hash)
            continue;
@@ -5739,7 +5738,7 @@ cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
       if (cmse_hash->root.root.u.def.section != section)
        {
          _bfd_error_handler
-           (_("%pB: `%s' and its special symbol are in different sections."),
+           (_("%pB: `%s' and its special symbol are in different sections"),
             input_bfd, sym_name);
          ret = FALSE;
        }
@@ -5751,14 +5750,14 @@ cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
       if (section->output_section == NULL)
        {
          _bfd_error_handler
-           (_("%pB: entry function `%s' not output."), input_bfd, sym_name);
+           (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
          continue;
        }
 
       if (hash->root.size == 0)
        {
          _bfd_error_handler
-           (_("%pB: entry function `%s' is empty."), input_bfd, sym_name);
+           (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
          ret = FALSE;
        }
 
@@ -5888,7 +5887,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
   if (!htab->cmse_implib)
     {
       _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
-                           "Gateway import libraries."), in_implib_bfd);
+                           "Gateway import libraries"), in_implib_bfd);
       return FALSE;
     }
 
@@ -5933,10 +5932,10 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
          || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
              != ST_BRANCH_TO_THUMB))
        {
-         _bfd_error_handler (_("%pB: invalid import library entry: `%s'."),
+         _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
+                               "symbol should be absolute, global and "
+                               "refer to Thumb functions"),
                              in_implib_bfd, sym_name);
-         _bfd_error_handler (_("Symbol should be absolute, global and "
-                               "refer to Thumb functions."));
          ret = FALSE;
          continue;
        }
@@ -5955,7 +5954,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
          bfd_boolean new_stub;
 
          _bfd_error_handler
-           (_("Entry function `%s' disappeared from secure code."), sym_name);
+           (_("entry function `%s' disappeared from secure code"), sym_name);
          hash = (struct elf32_arm_link_hash_entry *)
            elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
          stub_entry
@@ -5979,7 +5978,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
        {
          if (!cmse_entry_fct_p (hash))
            {
-             _bfd_error_handler (_("`%s' refers to a non entry function."),
+             _bfd_error_handler (_("`%s' refers to a non entry function"),
                                  sym_name);
              ret = FALSE;
            }
@@ -5994,7 +5993,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
          if (!!(flags & BSF_GLOBAL)
              != (hash->root.root.type == bfd_link_hash_defined))
            _bfd_error_handler
-             (_("%pB: visibility of symbol `%s' has changed."), in_implib_bfd,
+             (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
               sym_name);
 
          stub_entry->stub_offset = stub_offset;
@@ -6003,7 +6002,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
       /* Size should match that of a SG veneer.  */
       if (intsym->st_size != cmse_stub_size)
        {
-         _bfd_error_handler (_("%pB: incorrect size for symbol `%s'."),
+         _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
                              in_implib_bfd, sym_name);
          ret = FALSE;
        }
@@ -6022,8 +6021,8 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
       if (stub_offset % cmse_stub_size)
        {
          _bfd_error_handler
-           (_("Offset of veneer for entry function `%s' not a multiple of "
-              "its size."), sym_name);
+           (_("offset of veneer for entry function `%s' not a multiple of "
+              "its size"), sym_name);
          ret = FALSE;
        }
 
@@ -6050,7 +6049,7 @@ set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
   if (cmse_stub_array_start != cmse_stub_sec_vma)
     {
       _bfd_error_handler
-       (_("Start address of `%s' is different from previous link."),
+       (_("start address of `%s' is different from previous link"),
         out_sec_name);
       ret = FALSE;
     }
@@ -6757,8 +6756,8 @@ find_thumb_glue (struct bfd_link_info *link_info,
     (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
 
   if (hash == NULL
-      && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
-                  tmp_name, name) == -1)
+      && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
+                  "Thumb", tmp_name, name) == -1)
     *error_message = (char *) bfd_errmsg (bfd_error_system_call);
 
   free (tmp_name);
@@ -6793,8 +6792,8 @@ find_arm_glue (struct bfd_link_info *link_info,
     (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
 
   if (myh == NULL
-      && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
-                  tmp_name, name) == -1)
+      && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
+                  "ARM", tmp_name, name) == -1)
     *error_message = (char *) bfd_errmsg (bfd_error_system_call);
 
   free (tmp_name);
@@ -7508,7 +7507,7 @@ bfd_elf32_arm_process_before_allocation (bfd *abfd,
 
   if (globals->byteswap_code && !bfd_big_endian (abfd))
     {
-      _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode."),
+      _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
                          abfd);
       return FALSE;
     }
@@ -8303,8 +8302,8 @@ bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
                (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
 
              if (myh == NULL)
-               _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
-                                     "`%s'"), abfd, tmp_name);
+               _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+                                   abfd, "VFP11", tmp_name);
 
              vma = myh->root.u.def.section->output_section->vma
                    + myh->root.u.def.section->output_offset
@@ -8323,8 +8322,8 @@ bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
                (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
 
              if (myh == NULL)
-               _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
-                                     "`%s'"), abfd, tmp_name);
+               _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+                                   abfd, "VFP11", tmp_name);
 
              vma = myh->root.u.def.section->output_section->vma
                    + myh->root.u.def.section->output_offset
@@ -8389,8 +8388,8 @@ bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
                (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
 
              if (myh == NULL)
-               _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
-                                     "`%s'"), abfd, tmp_name);
+               _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+                                   abfd, "STM32L4XX", tmp_name);
 
              vma = myh->root.u.def.section->output_section->vma
                + myh->root.u.def.section->output_offset
@@ -8408,8 +8407,8 @@ bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
                (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
 
              if (myh == NULL)
-               _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
-                                     "`%s'"), abfd, tmp_name);
+               _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+                                   abfd, "STM32L4XX", tmp_name);
 
              vma = myh->root.u.def.section->output_section->vma
                + myh->root.u.def.section->output_offset
@@ -8616,10 +8615,10 @@ bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
                            _bfd_error_handler
                              /* xgettext:c-format */
                              (_("%pB(%pA+%#x): error: multiple load detected"
-                                " in non-last IT block instruction :"
-                                " STM32L4XX veneer cannot be generated.\n"
-                                "Use gcc option -mrestrict-it to generate"
-                                " only one instruction per IT block.\n"),
+                                " in non-last IT block instruction:"
+                                " STM32L4XX veneer cannot be generated"
+                                "use gcc option -mrestrict-it to generate"
+                                " only one instruction per IT block"),
                               abfd, sec, i);
                          }
                        else
@@ -8713,7 +8712,7 @@ bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
     globals->target2_reloc = R_ARM_GOT_PREL;
   else
     {
-      _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
+      _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
                          params->target2_type);
     }
   globals->fix_v4bx = params->fix_v4bx;
@@ -8803,9 +8802,9 @@ elf32_thumb_to_arm_stub (struct bfd_link_info * info,
          && !INTERWORK_FLAG (sym_sec->owner))
        {
          _bfd_error_handler
-           (_("%pB(%s): warning: interworking not enabled.\n"
-              "  first occurrence: %pB: Thumb call to ARM"),
-            sym_sec->owner, name, input_bfd);
+           (_("%pB(%s): warning: interworking not enabled;"
+              " first occurrence: %pB: %s call to %s"),
+            sym_sec->owner, name, input_bfd, "Thumb", "ARM");
 
          return FALSE;
        }
@@ -8893,9 +8892,9 @@ elf32_arm_create_thumb_stub (struct bfd_link_info * info,
          && !INTERWORK_FLAG (sym_sec->owner))
        {
          _bfd_error_handler
-           (_("%pB(%s): warning: interworking not enabled.\n"
-              "  first occurrence: %pB: arm call to thumb"),
-            sym_sec->owner, name, input_bfd);
+           (_("%pB(%s): warning: interworking not enabled;"
+              " first occurrence: %pB: %s call to %s"),
+            sym_sec->owner, name, input_bfd, "ARM", "Thumb");
        }
 
       --my_offset;
@@ -9455,7 +9454,7 @@ elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
            {
              /* FIXME: We ought to be able to generate thumb-1 PLT
                 instructions...  */
-             _bfd_error_handler (_("%pB: Warning: thumb-1 mode PLT generation not currently supported"),
+             _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
                                  output_bfd);
              return FALSE;
            }
@@ -9721,8 +9720,9 @@ elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
          _bfd_error_handler
            /* xgettext:c-format */
            (_("%pB(%pA+%#" PRIx64 "): "
-              "unexpected Thumb instruction '%#lx' in TLS trampoline"),
-            input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
+              "unexpected %s instruction '%#lx' in TLS trampoline"),
+            input_bfd, input_sec, (uint64_t) rel->r_offset,
+            "Thumb", insn);
          return bfd_reloc_notsupported;
        }
       break;
@@ -9762,8 +9762,9 @@ elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
          _bfd_error_handler
            /* xgettext:c-format */
            (_("%pB(%pA+%#" PRIx64 "): "
-              "unexpected ARM instruction '%#lx' in TLS trampoline"),
-            input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
+              "unexpected %s instruction '%#lx' in TLS trampoline"),
+            input_bfd, input_sec, (uint64_t) rel->r_offset,
+            "ARM", insn);
          return bfd_reloc_notsupported;
        }
       break;
@@ -10239,9 +10240,10 @@ elf32_arm_final_link_relocate (reloc_howto_type *          howto,
                 instruction instead ?  */
              if (branch_type != ST_BRANCH_TO_THUMB)
                _bfd_error_handler
-                 (_("\%pB: Warning: Arm BLX instruction targets Arm function '%s'."),
-                  input_bfd,
-                  h ? h->root.root.string : "(local)");
+                 (_("\%pB: warning: %s BLX instruction targets"
+                    " %s function '%s'"),
+                  input_bfd, "ARM",
+                  "ARM", h ? h->root.root.string : "(local)");
            }
          else if (r_type == R_ARM_PC24)
            {
@@ -10665,9 +10667,10 @@ elf32_arm_final_link_relocate (reloc_howto_type *          howto,
               instruction instead ?  */
            if (branch_type == ST_BRANCH_TO_THUMB)
              _bfd_error_handler
-               (_("%pB: Warning: Thumb BLX instruction targets thumb function '%s'."),
-                input_bfd,
-                h ? h->root.root.string : "(local)");
+               (_("%pB: warning: %s BLX instruction targets"
+                  " %s function '%s'"),
+                input_bfd, "Thumb",
+                "Thumb", h ? h->root.root.string : "(local)");
          }
        else
          {
@@ -11534,10 +11537,10 @@ elf32_arm_final_link_relocate (reloc_howto_type *         howto,
                    _bfd_error_handler
                      /* xgettext:c-format */
                      (_("%pB(%pA+%#" PRIx64 "): "
-                        "unexpected Thumb instruction '%#lx' "
+                        "unexpected %s instruction '%#lx' "
                         "referenced by TLS_GOTDESC"),
                       input_bfd, input_section, (uint64_t) rel->r_offset,
-                      insn);
+                      "Thumb", insn);
                    return bfd_reloc_notsupported;
                  }
              }
@@ -11560,10 +11563,10 @@ elf32_arm_final_link_relocate (reloc_howto_type *         howto,
                    _bfd_error_handler
                      /* xgettext:c-format */
                      (_("%pB(%pA+%#" PRIx64 "): "
-                        "unexpected ARM instruction '%#lx' "
+                        "unexpected %s instruction '%#lx' "
                         "referenced by TLS_GOTDESC"),
                       input_bfd, input_section, (uint64_t) rel->r_offset,
-                      insn);
+                      "ARM", insn);
                    return bfd_reloc_notsupported;
                  }
              }
@@ -11805,7 +11808,7 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
              {
                _bfd_error_handler
                  /* xgettext:c-format */
-                 (_("%pB(%pA+%#" PRIx64 "): Only ADD or SUB instructions "
+                 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
                     "are allowed for ALU group relocations"),
                  input_bfd, input_section, (uint64_t) rel->r_offset);
                return bfd_reloc_overflow;
@@ -11846,7 +11849,7 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
          {
            _bfd_error_handler
              /* xgettext:c-format */
-             (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+             (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
                 "splitting %#" PRIx64 " for group relocation %s"),
               input_bfd, input_section, (uint64_t) rel->r_offset,
               (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
@@ -11938,7 +11941,7 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
          {
            _bfd_error_handler
              /* xgettext:c-format */
-             (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+             (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
                 "splitting %#" PRIx64 " for group relocation %s"),
               input_bfd, input_section, (uint64_t) rel->r_offset,
               (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
@@ -12026,7 +12029,7 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
          {
            _bfd_error_handler
              /* xgettext:c-format */
-             (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+             (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
                 "splitting %#" PRIx64 " for group relocation %s"),
               input_bfd, input_section, (uint64_t) rel->r_offset,
               (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
@@ -12116,7 +12119,7 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
          {
            _bfd_error_handler
              /* xgettext:c-format */
-             (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+             (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
                 "splitting %#" PRIx64 " for group relocation %s"),
               input_bfd, input_section, (uint64_t) rel->r_offset,
               (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
@@ -13038,11 +13041,11 @@ elf32_arm_set_private_flags (bfd *abfd, flagword flags)
        {
          if (flags & EF_ARM_INTERWORK)
            _bfd_error_handler
-             (_("Warning: Not setting interworking flag of %pB since it has already been specified as non-interworking"),
+             (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
               abfd);
          else
            _bfd_error_handler
-             (_("Warning: Clearing the interworking flag of %pB due to outside request"),
+             (_("warning: clearing the interworking flag of %pB due to outside request"),
               abfd);
        }
     }
@@ -13087,7 +13090,7 @@ elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
        {
          if (out_flags & EF_ARM_INTERWORK)
            _bfd_error_handler
-             (_("Warning: Clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
+             (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
               obfd, ibfd);
 
          in_flags &= ~EF_ARM_INTERWORK;
@@ -13174,7 +13177,7 @@ elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
   if ((tag & 127) < 64)
     {
       _bfd_error_handler
-       (_("%pB: Unknown mandatory EABI object attribute %d"),
+       (_("%pB: unknown mandatory EABI object attribute %d"),
         abfd, tag);
       bfd_set_error (bfd_error_bad_value);
       return FALSE;
@@ -13182,7 +13185,7 @@ elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
   else
     {
       _bfd_error_handler
-       (_("Warning: %pB: Unknown EABI object attribute %d"),
+       (_("warning: %pB: unknown EABI object attribute %d"),
         abfd, tag);
       return TRUE;
     }
@@ -13449,7 +13452,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
 
   if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
     {
-      _bfd_error_handler (_("error: %pB: Unknown CPU architecture"), ibfd);
+      _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
       return -1;
     }
 
@@ -13487,7 +13490,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
 
   if (result == -1)
     {
-      _bfd_error_handler (_("error: %pB: Conflicting CPU architectures %d/%d"),
+      _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
                          ibfd, oldtag, newtag);
       return -1;
     }
@@ -13797,7 +13800,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
              else
                {
                  _bfd_error_handler
-                   (_("error: %pB: Conflicting architecture profiles %c/%c"),
+                   (_("error: %pB: conflicting architecture profiles %c/%c"),
                     ibfd,
                     in_attr[i].i ? in_attr[i].i : '0',
                     out_attr[i].i ? out_attr[i].i : '0');
@@ -13936,7 +13939,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
              /* It's sometimes ok to mix different configs, so this is only
                 a warning.  */
              _bfd_error_handler
-               (_("Warning: %pB: Conflicting platform configuration"), ibfd);
+               (_("warning: %pB: conflicting platform configuration"), ibfd);
            }
          break;
        case Tag_ABI_PCS_R9_use:
@@ -13945,7 +13948,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
              && in_attr[i].i != AEABI_R9_unused)
            {
              _bfd_error_handler
-               (_("error: %pB: Conflicting use of R9"), ibfd);
+               (_("error: %pB: conflicting use of R9"), ibfd);
              result = FALSE;
            }
          if (out_attr[i].i == AEABI_R9_unused)
@@ -15898,7 +15901,7 @@ elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
       if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
          || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
          || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
-       _bfd_error_handler (_("Errors encountered processing file %pB"), ibfd);
+       _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
     }
 
   /* Allocate space for the glue sections now that we've sized them.  */
@@ -18439,9 +18442,9 @@ elf32_arm_write_section (bfd *output_bfd,
 
                    _bfd_error_handler
                      (_("%pB(%#" PRIx64 "): error: "
-                        "Cannot create STM32L4XX veneer. "
-                        "Jump out of range by %" PRId64 " bytes. "
-                        "Cannot encode branch instruction. "),
+                        "cannot create STM32L4XX veneer; "
+                        "jump out of range by %" PRId64 " bytes; "
+                        "cannot encode branch instruction"),
                       output_bfd,
                       (uint64_t) (stm32l4xx_errnode->vma - 4),
                       (int64_t) out_of_range);
@@ -18477,8 +18480,8 @@ elf32_arm_write_section (bfd *output_bfd,
                              STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
                    || (signed) (veneer_r - veneer) >= (1 << 24))
                  {
-                   _bfd_error_handler (_("%pB: error: Cannot create STM32L4XX "
-                                         "veneer."), output_bfd);
+                   _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
+                                         "veneer"), output_bfd);
                     continue;
                  }
 
@@ -19575,7 +19578,7 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
                                      EF_ARM_EABI_VERSION (out_flags)))
     {
       _bfd_error_handler
-       (_("error: Source object %pB has EABI version %d, but target %pB has EABI version %d"),
+       (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
         ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
         obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
       return FALSE;
@@ -19614,12 +19617,12 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
        {
          if (in_flags & EF_ARM_VFP_FLOAT)
            _bfd_error_handler
-             (_("error: %pB uses VFP instructions, whereas %pB does not"),
-              ibfd, obfd);
+             (_("error: %pB uses %s instructions, whereas %pB does not"),
+              ibfd, "VFP", obfd);
          else
            _bfd_error_handler
-             (_("error: %pB uses FPA instructions, whereas %pB does not"),
-              ibfd, obfd);
+             (_("error: %pB uses %s instructions, whereas %pB does not"),
+              ibfd, "FPA", obfd);
 
          flags_compatible = FALSE;
        }
@@ -19628,12 +19631,12 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
        {
          if (in_flags & EF_ARM_MAVERICK_FLOAT)
            _bfd_error_handler
-             (_("error: %pB uses Maverick instructions, whereas %pB does not"),
-              ibfd, obfd);
+             (_("error: %pB uses %s instructions, whereas %pB does not"),
+              ibfd, "Maverick", obfd);
          else
            _bfd_error_handler
-             (_("error: %pB does not use Maverick instructions, whereas %pB does"),
-              ibfd, obfd);
+             (_("error: %pB does not use %s instructions, whereas %pB does"),
+              ibfd, "Maverick", obfd);
 
          flags_compatible = FALSE;
        }
@@ -19669,13 +19672,13 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
          if (in_flags & EF_ARM_INTERWORK)
            {
              _bfd_error_handler
-               (_("Warning: %pB supports interworking, whereas %pB does not"),
+               (_("warning: %pB supports interworking, whereas %pB does not"),
                 ibfd, obfd);
            }
          else
            {
              _bfd_error_handler
-               (_("Warning: %pB does not support interworking, whereas %pB does"),
+               (_("warning: %pB does not support interworking, whereas %pB does"),
                 ibfd, obfd);
            }
        }
index 638ee1547db26883e3d6b332a0184d1ed365494e..a6d3cce88fcc9db1183a8c05a8168ea2736d60e4 100644 (file)
@@ -4885,7 +4885,7 @@ make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
   abfd = stub_entry->target_section->owner;
   if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
     _bfd_error_handler
-      (_("%pB: error: Erratum 835769 stub out "
+      (_("%pB: error: erratum 835769 stub out "
         "of range (input file too large)"), abfd);
 
   target = stub_entry->target_value;
@@ -4966,7 +4966,7 @@ _bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
       abfd = stub_entry->target_section->owner;
       if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
        _bfd_error_handler
-         (_("%pB: error: Erratum 843419 stub out "
+         (_("%pB: error: erratum 843419 stub out "
             "of range (input file too large)"), abfd);
 
       branch_insn = 0x14000000;
@@ -5572,7 +5572,7 @@ bad_ifunc_reloc:
            int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
            _bfd_error_handler
              /* xgettext:c-format */
-             (_("%pB: Local symbol descriptor table be NULL when applying "
+             (_("%pB: local symbol descriptor table be NULL when applying "
                 "relocation %s against local symbol"),
               input_bfd, elfNN_aarch64_howto_table[howto_index].name);
            abort ();
@@ -6596,7 +6596,7 @@ elfNN_aarch64_relocate_section (bfd *output_bfd,
                {
                  (*info->callbacks->warning)
                    (info,
-                    _("Too many GOT entries for -fpic, "
+                    _("too many GOT entries for -fpic, "
                       "please recompile with -fPIC"),
                     name, input_bfd, input_section, rel->r_offset);
                  return FALSE;
@@ -6624,9 +6624,9 @@ elfNN_aarch64_relocate_section (bfd *output_bfd,
                      || real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
                {
                  info->callbacks->warning
-                   (info, _("One possible cause of this error is that the \
+                   (info, _("one possible cause of this error is that the \
 symbol is being referenced in the indicated code as if it had a larger \
-alignment than was declared where it was defined."),
+alignment than was declared where it was defined"),
                     name, input_bfd, input_section, rel->r_offset);
                }
              break;
index d2bab36277f53784fb8a021bc00d9286d8a4017f..aa0fdc9c6e38c7176747f13a8cd8e00fef34131e 100644 (file)
@@ -1,3 +1,30 @@
+2018-02-26  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/ld-aarch64/reloc-overflow-bad.d,
+       * testsuite/ld-arm/attr-merge-9.out,
+       * testsuite/ld-arm/attr-merge-arch-2.d,
+       * testsuite/ld-arm/attr-merge-unknown-1.d,
+       * testsuite/ld-arm/attr-merge-unknown-2.d,
+       * testsuite/ld-arm/attr-merge-unknown-2r.d,
+       * testsuite/ld-arm/attr-merge-unknown-3.d,
+       * testsuite/ld-arm/cmse-implib-errors.out,
+       * testsuite/ld-arm/cmse-new-earlier-later-implib.out,
+       * testsuite/ld-arm/cmse-new-implib-no-output.out,
+       * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
+       * testsuite/ld-arm/cmse-new-implib.out,
+       * testsuite/ld-arm/cmse-new-wrong-implib.out,
+       * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
+       * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
+       * testsuite/ld-arm/group-relocs-alu-bad-2.d,
+       * testsuite/ld-arm/group-relocs-alu-bad.d,
+       * testsuite/ld-arm/group-relocs-ldc-bad-2.d,
+       * testsuite/ld-arm/group-relocs-ldc-bad.d,
+       * testsuite/ld-arm/group-relocs-ldr-bad-2.d,
+       * testsuite/ld-arm/group-relocs-ldr-bad.d,
+       * testsuite/ld-arm/group-relocs-ldrs-bad-2.d,
+       * testsuite/ld-arm/group-relocs-ldrs-bad.d,
+       * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
+
 2018-02-26  Alan Modra  <amodra@gmail.com>
 
        * testsuite/ld-mips-elf/attr-gnu-4-12.d,
index 39f7e31f535c0c89fcf7fcd75c9cfe12bf30db39..cb9ead02feceda879cc51b623c745bdbbad04f8c 100644 (file)
@@ -1,4 +1,4 @@
 #source: reloc-overflow-1.s
 #source: reloc-overflow-2.s
 #ld: -e0
-#error: .*One possible cause.*
+#error: .*one possible cause.*
index bb09181f6c02f55c11224cddac308085106919ca..6c3e5f36c17237fc4cc3726b73c2dac3057d7380 100644 (file)
@@ -1,2 +1,2 @@
-.*: error: .*: Conflicting CPU architectures 10/16
+.*: error: .*: conflicting CPU architectures 10/16
 .*: failed to merge target specific data of file tmpdir/attr-merge-9b.o
index 0e98edb6612a84bb46324bd2c8d026399dd0543c..f7de02cf24062f6d83cf9f536dcf96aa2477cc32 100644 (file)
@@ -2,4 +2,4 @@
 #source: attr-merge-arch-2b.s
 #as:
 #ld: -e main
-#error: Conflicting CPU architectures 13/0
+#error: conflicting CPU architectures 13/0
index 38acff9521a7aba1173fb6bf5ad19d703068d0ab..00e69ba74818e618b07c96998f0cf0da0d9b5458 100644 (file)
@@ -2,4 +2,4 @@
 #source: blank.s
 #as:
 #ld:
-#error: Unknown mandatory EABI object attribute 40
+#error: unknown mandatory EABI object attribute 40
index bf44f43c7144058e7038fff2580a8d0932bde205..45bb023477da64d82bdb247ccf561131222c04ee 100644 (file)
@@ -2,7 +2,7 @@
 #source: blank.s
 #as:
 #ld:
-#warning: Unknown EABI object attribute 82
+#warning: unknown EABI object attribute 82
 #readelf: -A
 # This test is only valid on ELF based ports.
 # not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
index 6d523fb06b8ff22098604a7775d9de2fb725adea..cfbc5dbe4cd55a83e6df6256f18e7ddb6eda22ff 100644 (file)
@@ -2,7 +2,7 @@
 #source: attr-merge-unknown-2.s
 #as:
 #ld:
-#warning: Unknown EABI object attribute 82
+#warning: unknown EABI object attribute 82
 #readelf: -A
 # This test is only valid on ELF based ports.
 # not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
index b02ba6d6d296799920e64cd221dc6786b1af108f..ca2016cfde00f725ad34aa6ce847fd978dc71f4e 100644 (file)
@@ -2,7 +2,7 @@
 #source: attr-merge-unknown-2.s
 #as:
 #ld:
-#warning: Unknown EABI object attribute 82
+#warning: unknown EABI object attribute 82
 #readelf: -A
 # This test is only valid on ELF based ports.
 # not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
index 0026f6be97e682c963ac9cc462784c2cf34fd003..6adb13086d22abaebfb71d1103842a78c9efdb2b 100644 (file)
@@ -1,7 +1,5 @@
-.*: .*: absent standard symbol `not_exported_fct2'.
-.*: .*: invalid special symbol `__acle_se_not_exported_pseudoentry_var'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid standard symbol `not_exported_pseudoentry_var'.
-.*: It must be a global or weak function symbol.
+.*: .*: absent standard symbol `not_exported_fct2'
+.*: .*: invalid special symbol `__acle_se_not_exported_pseudoentry_var'; it must be a global or weak function symbol
+.*: .*: invalid standard symbol `not_exported_pseudoentry_var'; it must be a global or weak function symbol
 .* cannot size stub section: Invalid operation
 #...
index b49ad0ac0770a17c39c2d119d1f0c5854a5bd8cc..3e4c17ea39d4fb6f1a0ec8364c134f93461cb43a 100644 (file)
@@ -1,3 +1,3 @@
-.*: Entry function `exported_entry_veneer3' disappeared from secure code.
-.*: Start address of `.gnu.sgstubs' is different from previous link.
+.*: entry function `exported_entry_veneer3' disappeared from secure code
+.*: start address of `.gnu.sgstubs' is different from previous link
 .*: cannot size stub section: Invalid operation
index 0590b71c844da3687b29b93797abda5172ab8d99..cb2e4dfebc368e2481e138e482ed23cb1dec7693 100644 (file)
@@ -1,4 +1,4 @@
-.*: Entry function `exported_entry_veneer3' disappeared from secure code.
+.*: entry function `exported_entry_veneer3' disappeared from secure code
 .*: new entry function\(s\) introduced but no output import library specified:
 .*:   exported_entry_veneer4
 .*:   exported_entry_veneer1
index c93c3fb97895286e05026b6eac696fa9de6c89f9..2c2658ea068363bc0a28cebbdcd9cfb48a16e6b2 100644 (file)
@@ -1,2 +1,2 @@
-.*: --in-implib only supported for Secure Gateway import libraries.
+.*: --in-implib only supported for Secure Gateway import libraries
 .*: cannot size stub section: Invalid operation
index c8af2807e7c1a7eeb1fc156fbf4508cf7a7e932d..bc284e02b9b09212b4966a4e9532d20b4bb976c8 100644 (file)
@@ -1 +1 @@
-.*: Entry function `exported_entry_veneer3' disappeared from secure code.
+.*: entry function `exported_entry_veneer3' disappeared from secure code
index 2afe4078e78606d24f05dda6ff1c5e6a54d42512..037ce73ee329f3d0ad6bb0408973387f169ea7d6 100644 (file)
@@ -1,3 +1,3 @@
-.*: .*: visibility of symbol `exported_entry_veneer2' has changed.
-.*: `exported_entry_fct2' refers to a non entry function.
+.*: .*: visibility of symbol `exported_entry_veneer2' has changed
+.*: `exported_entry_fct2' refers to a non entry function
 .*: cannot size stub section: Invalid operation
index 9d1e5ba3215ae8a29585fcf04ec1f94314670a29..3f151dd63e0bb8a30da34ca3b08af201d7de4c22 100644 (file)
@@ -1,3 +1,3 @@
-.*: No address assigned to the veneers output section .gnu.sgstubs
+.*: no address assigned to the veneers output section .gnu.sgstubs
 .*: cannot size stub section: Invalid operation
 #...
index fd4766ab877a4abbeb8b2c4c053ab11d3f86773c..2145d690813c8d02731f69daad4f9c5f8870551f 100644 (file)
@@ -1,19 +1,12 @@
-.*: .*: Special symbol `__acle_se_loc_entry_veneer1' only allowed for ARMv8-M architecture or later.
-.*: .*: invalid .* symbol `.*loc_entry_veneer1'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid special symbol `__acle_se_loc_entry_veneer2'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid special symbol `__acle_se_loc_entry_veneer4'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid standard symbol `loc_entry_veneer3'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid standard symbol `loc_entry_veneer5'.
-.*: It must be a global or weak function symbol.
-.*: .*: absent standard symbol `fake_entry_veneer1'.
-.*: .*: invalid standard symbol `obj_entry_veneer1'.
-.*: It must be a global or weak function symbol.
-.*: .*: invalid special symbol `__acle_se_obj_entry_veneer2'.
-.*: It must be a global or weak function symbol.
-.*: .*: `fake_entry_veneer2' and its special symbol are in different sections.
+.*: .*: special symbol `__acle_se_loc_entry_veneer1' only allowed for ARMv8-M architecture or later
+.*: .*: invalid .* symbol `.*loc_entry_veneer1'; it must be a global or weak function symbol
+.*: .*: invalid special symbol `__acle_se_loc_entry_veneer2'; it must be a global or weak function symbol
+.*: .*: invalid special symbol `__acle_se_loc_entry_veneer4'; it must be a global or weak function symbol
+.*: .*: invalid standard symbol `loc_entry_veneer3'; it must be a global or weak function symbol
+.*: .*: invalid standard symbol `loc_entry_veneer5'; it must be a global or weak function symbol
+.*: .*: absent standard symbol `fake_entry_veneer1'
+.*: .*: invalid standard symbol `obj_entry_veneer1'; it must be a global or weak function symbol
+.*: .*: invalid special symbol `__acle_se_obj_entry_veneer2'; it must be a global or weak function symbol
+.*: .*: `fake_entry_veneer2' and its special symbol are in different sections
 .*: cannot size stub section: Invalid operation
 #...
index 1f86ae46674a55d4a2b2d6833c3a9a0626a14e5a..e3f1df78a76f081f0fbbc67da56f15de918d4c91 100644 (file)
@@ -1,4 +1,4 @@
 #name: ALU group relocations failure test
 #source: group-relocs-alu-bad-2.s
 #ld: -Ttext 0x8000 --section-start foo=0x1208000
-#error: Overflow whilst splitting 0x1234 for group relocation
+#error: overflow whilst splitting 0x1234 for group relocation
index 0346db1a9732de6941297ed429d22e204f337f94..eae24e40912b217d5405b6e8fa58353052df88ff 100644 (file)
@@ -1,4 +1,4 @@
 #name: ALU group relocations failure test
 #source: group-relocs-alu-bad.s
 #ld: -Ttext 0x8000 --section-start foo=0x9010
-#error: Overflow whilst splitting 0x1010 for group relocation
+#error: overflow whilst splitting 0x1010 for group relocation
index e66b6d828b81bd12432b703d3c5e5219584cc83d..cc52eccc6ab61aeac50f4a3da9cd29b087e079ad 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDC group relocations failure test
 #source: group-relocs-ldc-bad-2.s
 #ld: -Ttext 0x8000 --section-start foo=0x118400
-#error: Overflow whilst splitting 0x123456 for group relocation
+#error: overflow whilst splitting 0x123456 for group relocation
index d4bfb2dfbddbfd7f6f0c96780284b61d9d196720..3891281e691c969f27acdd682735901e966ed0fb 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDC group relocations failure test
 #source: group-relocs-ldc-bad.s
 #ld: -Ttext 0x8000 --section-start foo=0x118400
-#error: Overflow whilst splitting 0x110400 for group relocation
+#error: overflow whilst splitting 0x110400 for group relocation
index 611d82668f6e3002984f1e4e6e5a5525bde73a22..771395da669f1e3e40de2ff290fef2317d33e9c3 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDR group relocations failure test
 #source: group-relocs-ldr-bad-2.s
 #ld: -Ttext 0x8000 --section-start foo=0x8001000
-#error: .*Overflow whilst splitting 0x7ff9000 for group relocation.*
+#error: .*overflow whilst splitting 0x7ff9000 for group relocation.*
index 76f3df1f841b45b7bd8b0123634f775874a3d7b9..681f83c77454a62627cd07598038139fbdc2f880 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDR group relocations failure test
 #source: group-relocs-ldr-bad.s
 #ld: -Ttext 0x8000 --section-start foo=0x8001000
-#error: .*Overflow whilst splitting 0x123456 for group relocation.*
+#error: .*overflow whilst splitting 0x123456 for group relocation.*
index 9d1c90086f69361fc776fad1d9aef949bc66d391..c104ea646da9bec49b69bb3ecc503508db5b67f9 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDRS group relocations failure test
 #source: group-relocs-ldrs-bad-2.s
 #ld: -Ttext 0x8000 --section-start foo=0x8000100
-#error: Overflow whilst splitting 0x7ff8100 for group relocation
+#error: overflow whilst splitting 0x7ff8100 for group relocation
index e5296f993e30b0a42f4c8755eb853f3dfa0825fd..7d68cce1bb32eb4101f592e123f1e2c98eb478f2 100644 (file)
@@ -1,4 +1,4 @@
 #name: LDRS group relocations failure test
 #source: group-relocs-ldrs-bad.s
 #ld: -Ttext 0x8000 --section-start foo=0x8000100
-#error: Overflow whilst splitting 0x123456 for group relocation
+#error: overflow whilst splitting 0x123456 for group relocation
index a7674d5cc9eb01383a2a8e6eb9dd8d71d454335e..8e785c611a9a839a57fd9b9c5b97bab0b33d1706 100644 (file)
@@ -3,7 +3,7 @@
 #ld:-EL --fix-stm32l4xx-629360 -Ttext=0x80000
 #objdump: -dr --prefix-addresses --show-raw-insn
 #name: STM32L4XX erratum : LDM cannot be patched when LDM is too far from veneer section
-#warning: .*Cannot create STM32L4XX veneer. Jump out of range by 24 bytes. Cannot encode branch instruction.*
+#warning: .*cannot create STM32L4XX veneer; jump out of range by 24 bytes; cannot encode branch instruction.*
 
 # Test the `LDM*' instructions when too far from the veneer section
 # They cannot, thus should not, be patched