sparc: Move translation constants from isa_traits.hh into tlb.hh.

These aren't used outside of SPARC. Also get rid of some unused
constants.

Change-Id: Icfe119f88189348245a6f225a61e62dfa93ea951
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18470
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 5bcfc04a43a6310cc973787db10f13d81f6356e0..f42cdb9f55376713988bc5e22064c195cde87b6e 100644 (file)
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -44,23 +44,11 @@ namespace SparcISA
 // This makes sure the big endian versions of certain functions are used.
 using namespace BigEndianGuest;
 
-// real address virtual mapping
-// sort of like alpha super page, but less frequently used
-const Addr SegKPMEnd  = ULL(0xfffffffc00000000);
-const Addr SegKPMBase = ULL(0xfffffac000000000);
-
 const Addr PageShift = 13;
 const Addr PageBytes = ULL(1) << PageShift;
 
 StaticInstPtr decodeInst(ExtMachInst);
 
-/////////// TLB Stuff ////////////
-const Addr StartVAddrHole = ULL(0x0000800000000000);
-const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
-const Addr VAddrAMask = ULL(0xFFFFFFFF);
-const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
-const Addr BytesInPageMask = ULL(0x1FFF);
-
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;
 

diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index e5e6753be8eca405136b39b937291bb74e795da1..0d173da3230d3944b65056ce1f51b5c9f1a54eb3 100644 (file)
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -44,6 +44,11 @@ class Packet;
 namespace SparcISA
 {
 
+const Addr StartVAddrHole = ULL(0x0000800000000000);
+const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
+const Addr VAddrAMask = ULL(0xFFFFFFFF);
+const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
+
 class TLB : public BaseTLB
 {
     // These faults need to be able to populate the tlb in SE mode.