(no commit message)

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index 4e31821445d24cfdedcbaf73cffcb413d74e8342..dd0dbf8ef70c3ea9c70fca13f23a6447423cc76a 100644 (file)
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -661,8 +661,11 @@ The CR-based data-driven fail-on-first is new and not found in ARM
 SVE or RVV. At the same time it is also "old" because it is a generalisation
 of the Z80
 [Block compare](https://rvbelzen.tripod.com/z80prgtemp/z80prg04.htm)
-instructions, especially 
- It is extremely useful for reducing instruction count,
+instructions, especially
+[CPIR](http://z80-heaven.wikidot.com/instructions-set:cpir)
+which is based on CP (compare) as the ultimate "element" (suffix)
+operation to which the repeat (prefix) is applied.
+It is extremely useful for reducing instruction count,
 however requires speculative execution involving modifications of VL
 to get high performance implementations.  An additional mode (RC1=1)
 effectively turns what would otherwise be an arithmetic operation