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diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn
index f054ce722e624c2ed158b8bd16c0bd6daad131eb..8af509b4e14c68d49a6367c241e949c5c35194d9 100644 (file)
--- a/openpower/sv/overview/discussion.mdwn
+++ b/openpower/sv/overview/discussion.mdwn
@@ -306,7 +306,8 @@ half-word element `e4` starting from **GPR(2)** actually wrote to
 half-word element `e0` of GPR(3):
 
 Establishing the MSB0-ordering Bytes B0-B7 thru Half and Words H0-H3
-and W0-W1 with the LE-ordered c union for one single register, r0,
+and W0-W1 with the LE-ordered c union for one single register,
+`r0=GPR(0)`,
 is as follows:
 
     | B0     | B1    | B2    | B3    | B4    |    B5 |    B6 |    B7   |
@@ -318,5 +319,24 @@ is as follows:
     |             r0.i[1]                         r0.i[1]              |
     |                            r0.l[0]                               |
 
-It is however just as critical to note that the following are also identical:
+It is however just as critical to note that the following are also identical,
+where `r0=GPR(0)` and `r1=GPR(1)`:
 
+    | B0     | B1    | B2    | B3    | B4    |    B5 |    B6 |    B7   |
+    |        H0      |      H1       |      H2       |      H3         |
+    |                W0              |               W1                |
+    |                                D0                                |
+    |     r0.s[7]        r0.s[6]         r0.s[5]         r0.s[4]       |
+    |     r1.s[3]        r1.s[2]         r1.s[1]         r1.s[0]       |
+    |             r0.i[3]                         r0.i[2]              |
+    |             r1.i[1]                         r1.i[1]              |
+    |                            r0.l[1]                               |
+    |                            r1.l[0]                               |
+
+These "aliases" which extend fully for all elements
+e0 onwards and all registers r0 onwards are down to
+the **intentionally-defined** overlaps in the canonical
+definition from the c union.  It can also be clearly seen
+why LSB0-numbering for elements and registers was picked
+because it would be near-possible to explain the overlapping
+when Scalability (VL, MAXVL) is introduced.