+2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_assemble): Only check i.operands for AX.
+ (md_estimate_size_before_relax): Don't relax IFUNC symbols.
+
2009-07-16 Nathan Sidwell <nathan@codesourcery.com>
* config/tc-arm.c (md_apply_fix <BFD_RELOC_ARM_TARGET2>): Write
if (i.types[0].bitfield.imm1)
i.imm_operands = 0; /* kludge for shift insns. */
- for (j = 0; j < 3; j++)
+ for (j = 0; j < i.operands; j++)
if (i.types[j].bitfield.inoutportreg
|| i.types[j].bitfield.shiftcount
|| i.types[j].bitfield.acc
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
|| (IS_ELF
&& (S_IS_EXTERNAL (fragP->fr_symbol)
- || S_IS_WEAK (fragP->fr_symbol)))
+ || S_IS_WEAK (fragP->fr_symbol)
+ || ((symbol_get_bfdsym (fragP->fr_symbol)->flags
+ & BSF_GNU_INDIRECT_FUNCTION))))
#endif
#if defined (OBJ_COFF) && defined (TE_PE)
|| (OUTPUT_FLAVOR == bfd_target_coff_flavour
+2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run ifunc and x86-64-ifunc.
+
+ * gas/i386/ifunc.d: New,
+ * gas/i386/ifunc.s: Likewise.
+ * gas/i386/x86-64-ifunc.d: Likewise.
+
2009-07-16 Nathan Sidwell <nathan@codesourcery.com>
* gas/arm/target-reloc-1.s: New.
run_dump_test "intel-regs"
run_list_test "inval-equ-1" "-al"
run_list_test "inval-equ-2" "-al"
+ run_dump_test "ifunc"
}
# This is a PE specific test.
run_dump_test "reloc64"
run_list_test "reloc64" "--defsym _bad_=1"
run_dump_test "mixed-mode-reloc64"
+ run_dump_test "x86-64-ifunc"
}
set ASFLAGS "$old_ASFLAGS"
--- /dev/null
+#objdump: -drw
+#name: i386 ifunc
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: e9 fc ff ff ff jmp 1 <foo\+0x1> 1: R_386_PLT32 ifunc
+
+0+5 <ifunc>:
+[ ]*[a-f0-9]+: c3 ret
+
+0+6 <bar>:
+[ ]*[a-f0-9]+: eb 00 jmp 8 <normal>
+
+0+8 <normal>:
+[ ]*[a-f0-9]+: c3 ret
+#pass
--- /dev/null
+ .global foo
+ .type foo, @function
+foo:
+ jmp ifunc@PLT
+ .type ifunc, @gnu_indirect_function
+ifunc:
+ ret
+ .global bar
+ .type bar, @function
+bar:
+ jmp normal@PLT
+ .type normal, @function
+normal:
+ ret
--- /dev/null
+#source: ifunc.s
+#objdump: -drw
+#name: x86-64 ifunc
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
+
+0+5 <ifunc>:
+[ ]*[a-f0-9]+: c3 retq
+
+0+6 <bar>:
+[ ]*[a-f0-9]+: eb 00 jmp 8 <normal>
+
+0+8 <normal>:
+[ ]*[a-f0-9]+: c3 retq
+#pass