support ignoring integer registers for ExpectedState

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index d32f4b3efdd00338b1b224698346422310aa3a36..50a015208c587d167a0cb6ab3a92c614a0a90cb2 100644 (file)
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -170,6 +170,8 @@ class State:
         # Compare int registers
         for i, (intreg, intreg2) in enumerate(
                 zip(self.intregs, s2.intregs)):
+            if intreg is None or intreg2 is None:
+                continue
             log("asserting...reg", i, intreg, intreg2)
             log("code, frepr(code)", self.code, repr(self.code))
             self.dut.assertEqual(intreg, intreg2,