+2001-02-27 Nick Clifton <nickc@redhat.com>
+
+ * armvirt.c (GetWord): Add new parameter - check - to enable or
+ disable the alignment checking.
+ (PutWord): Add new parameter - check - to enable or disable the
+ alignment checking.
+ (ARMul_ReLoadInstr): Pass extra parameter to GetWord.
+ (ARMul_ReadWord): Pass extra parameter to GetWord.
+ (ARMul_WriteWord): Pass extra parameter to PutWord.
+ (ARMul_StoreHalfWord): Pass extra parameter to PutWord.
+ (ARMul_WriteByte): Pass extra parameter to GetWord.
+ (ARMul_SwapWord): Pass extra parameter to PutWord.
+ (ARMul_SafeReadByte): New Function: Read a byte but do not abort.
+ (ARMul_SafeWriteByte): New Function: Write a byte but do not abort.
+
+ * armdefs.h: Add prototypes for ARMul_SafeReadByte and
+ ARMul_SafeWriteByte.
+
+ * wrapper.c (sim_write): Use ARMul_SafeWriteByte.
+ (sim_read): Use ARMul_SafeReadByte.
+
+ * armos.c (in_SWI_handler): Remove.
+ (SWIWrite0): Use ARMul_SafeReadByte.
+ (WriteCommandLineTo): Use ARMul_SafeWriteByte.
+ (SWIopen): Use ARMul_SafeReadByte.
+ (SWIread): Use ARMul_SafeWriteByte.
+ (SWIwrite): Use ARMul_SafeReadByte.
+ (ARMul_OSHandleSWI): Remove use of is_SWI_handler.
+ (ARMul_OSException): Remove use of is_SWI_handler.
+
2001-02-16 Nick Clifton <nickc@redhat.com>
* armemu.c: Remove Prefetch abort for breakpoints. Instead set
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "armdefs.h"
+#include "armos.h"
#include "armemu.h"
#include "ansidecl.h"
/* Store a value into one of coprocessor 15's registers. */
void
-write_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
+write_cp15_reg (ARMul_State * state, unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
{
if (opcode_2)
{
return;
}
-/* Return the value in a cp13 register. */
+/* Return the value in a cp15 register. */
-static ARMword
+ARMword
read_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm)
{
if (opcode_2 == 0)
result = check_cp15_access (state, reg, 0, 0, 0);
if (result == ARMul_DONE && type == ARMul_DATA)
- write_cp15_reg (reg, 0, 0, data);
+ write_cp15_reg (state, reg, 0, 0, data);
return result;
}
result = check_cp15_access (state, reg, CRm, BITS (21, 23), opcode_2);
if (result == ARMul_DONE)
- write_cp15_reg (reg, opcode_2, CRm, value);
+ write_cp15_reg (state, reg, opcode_2, CRm, value);
return result;
}
{
/* FIXME: Not sure what to do about the alternative register set
here. For now default to just accessing CRm == 0 registers. */
- write_cp15_reg (reg, 0, 0, value);
+ write_cp15_reg (state, reg, 0, 0, value);
return TRUE;
}
extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
+extern ARMword ARMul_SafeReadByte (ARMul_State * state, ARMword address);
extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
ARMword data);
extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
ARMword data);
+extern void ARMul_SafeWriteByte (ARMul_State * state, ARMword address,
+ ARMword data);
extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
ARMword, ARMword, ARMword, ARMword, ARMword,
value |= 0xc;
write_cp14_reg (10, value);
- write_cp15_reg (5, 0, 0, 0x200); /* Set FSR. */
- write_cp15_reg (6, 0, 0, pc); /* Set FAR. */
+ write_cp15_reg (state, 5, 0, 0, 0x200); /* Set FSR. */
+ write_cp15_reg (state, 6, 0, 0, pc); /* Set FAR. */
}
else
break;
ARMul_LDCs *, ARMul_STCs *, ARMul_MRCs *, ARMul_MCRs *,
ARMul_CDPs *, ARMul_CPReads *, ARMul_CPWrites *);
extern void ARMul_CoProDetach (ARMul_State *, unsigned);
-extern void write_cp15_reg (unsigned, unsigned, unsigned, ARMword);
+extern void write_cp15_reg (ARMul_State *, unsigned, unsigned, unsigned, ARMword);
extern void write_cp14_reg (unsigned, ARMword);
extern ARMword read_cp14_reg (unsigned);
0xe1a0f00e /* Default handler */
};
-/* Set to prevent aborts when emulating SWI routines. */
-static int in_SWI_handler = 0;
-
/* Time for the Operating System to initialise itself. */
unsigned
ARMword temp;
struct OSblock *OSptr = (struct OSblock *) state->OSptr;
- while ((temp = ARMul_ReadByte (state, addr++)) != 0)
+ while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)
(void) fputc ((char) temp, stdout);
OSptr->ErrorNo = errno;
do
{
temp = (ARMword) * cptr++;
- ARMul_WriteByte (state, addr++, temp);
+ ARMul_SafeWriteByte (state, addr++, temp);
}
while (temp != 0);
}
int flags;
int i;
- for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++)
+ for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++)
;
/* Now we need to decode the Demon open mode. */
res = read (f, local, len);
if (res > 0)
for (i = 0; i < res; i++)
- ARMul_WriteByte (state, ptr + i, local[i]);
+ ARMul_SafeWriteByte (state, ptr + i, local[i]);
free (local);
state->Reg[0] = res == -1 ? -1 : len - res;
}
for (i = 0; i < len; i++)
- local[i] = ARMul_ReadByte (state, ptr + i);
+ local[i] = ARMul_SafeReadByte (state, ptr + i);
res = write (f, local, len);
state->Reg[0] = res == -1 ? -1 : len - res;
ARMword saved_number = 0;
struct OSblock * OSptr = (struct OSblock *) state->OSptr;
- in_SWI_handler = 1;
-
/* Intel do not want DEMON SWI support. */
if (state->is_XScale)
switch (number)
case AngelSWI_Reason_EnterSVC:
default:
state->Emulate = FALSE;
- in_SWI_handler = 0;
return FALSE;
case AngelSWI_Reason_Clock:
break;
case AngelSWI_Reason_WriteC:
- (void) fputc ((int) ARMul_ReadByte (state, addr), stdout);
+ (void) fputc ((int) ARMul_SafeReadByte (state, addr), stdout);
OSptr->ErrorNo = errno;
/* Fall thgrough. */
break;
default:
- in_SWI_handler = 0;
-
/* If there is a SWI vector installed use it. */
if (state->is_XScale && saved_number != -1)
number = saved_number;
}
}
- in_SWI_handler = 0;
return TRUE;
}
ARMword vector ATTRIBUTE_UNUSED,
ARMword pc ATTRIBUTE_UNUSED)
{
- /* If we are inside a SWI handler routine, then ignore any exceptions.
- They could be caused by data exceptions for misaligned reads, for
- example, but for the purposes of emulating a SWI, we do not care. */
-
- return in_SWI_handler;
+ return FALSE;
}
#endif
defined to generate aborts. */
#include "armopts.h"
+#include "armos.h"
#include "armdefs.h"
#include "ansidecl.h"
\***************************************************************************/
static ARMword
-GetWord (ARMul_State * state, ARMword address)
+GetWord (ARMul_State * state, ARMword address, int check)
{
ARMword page;
ARMword offset;
\***************************************************************************/
static void
-PutWord (ARMul_State * state, ARMword address, ARMword data)
+PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
{
ARMword page;
ARMword offset;
if ((isize == 2) && (address & 0x2))
{
/* We return the next two halfwords: */
- ARMword lo = GetWord (state, address);
- ARMword hi = GetWord (state, address + 4);
+ ARMword lo = GetWord (state, address, TRUE);
+ ARMword hi = GetWord (state, address + 4, TRUE);
if (state->bigendSig == HIGH)
return (lo << 16) | (hi >> 16);
return ((hi & 0xFFFF) << 16) | (lo >> 16);
}
- return GetWord (state, address);
+ return GetWord (state, address, TRUE);
}
/***************************************************************************\
}
#endif
- return GetWord (state, address);
+ return GetWord (state, address, TRUE);
}
/***************************************************************************\
}
#endif
- PutWord (state, address, data);
+ PutWord (state, address, data, TRUE);
}
/***************************************************************************\
offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
PutWord (state, address,
- (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset));
+ (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset),
+ TRUE);
}
/***************************************************************************\
offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
PutWord (state, address,
- (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset));
+ (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
+ TRUE);
}
/***************************************************************************\
state->NumNcycles++;
- PutWord (state, address, data);
+ PutWord (state, address, data, TRUE);
return temp;
}
state->NumCcycles += number;
ARMul_CLEARABORT;
}
+
+
+/* Read a byte. Do not check for alignment or access errors. */
+
+ARMword
+ARMul_SafeReadByte (ARMul_State * state, ARMword address)
+{
+ ARMword temp, offset;
+
+ temp = GetWord (state, address, FALSE);
+ offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
+
+ return (temp >> offset & 0xffL);
+}
+
+void
+ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
+{
+ ARMword temp, offset;
+
+ temp = GetWord (state, address, FALSE);
+ offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
+
+ PutWord (state, address,
+ (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
+ FALSE);
+}
/* run front end support for arm
- Copyright (C) 1995, 1996, 1997, 2000 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
This file is part of ARM SIM.
init ();
for (i = 0; i < size; i++)
- ARMul_WriteByte (state, addr + i, buffer[i]);
+ ARMul_SafeWriteByte (state, addr + i, buffer[i]);
return size;
}
int size;
{
int i;
+
init ();
for (i = 0; i < size; i++)
- {
- buffer[i] = ARMul_ReadByte (state, addr + i);
- }
+ buffer[i] = ARMul_SafeReadByte (state, addr + i);
+
return size;
}