tgsi: rename fields of tgsi_full_src_register to reduce verbosity
authorKeith Whitwell <keithw@vmware.com>
Tue, 24 Nov 2009 15:13:17 +0000 (15:13 +0000)
committerKeith Whitwell <keithw@vmware.com>
Tue, 24 Nov 2009 15:13:17 +0000 (15:13 +0000)
SrcRegister -> Register
SrcRegisterInd -> Indirect
SrcRegisterDim -> Dimension
SrcRegisterDimInd -> DimIndirect

32 files changed:
src/gallium/auxiliary/draw/draw_pipe_aaline.c
src/gallium/auxiliary/draw/draw_pipe_aapoint.c
src/gallium/auxiliary/draw/draw_pipe_pstipple.c
src/gallium/auxiliary/draw/draw_vs_aos.c
src/gallium/auxiliary/gallivm/tgsitollvm.cpp
src/gallium/auxiliary/tgsi/tgsi_build.c
src/gallium/auxiliary/tgsi/tgsi_dump.c
src/gallium/auxiliary/tgsi/tgsi_dump_c.c
src/gallium/auxiliary/tgsi/tgsi_exec.c
src/gallium/auxiliary/tgsi/tgsi_parse.c
src/gallium/auxiliary/tgsi/tgsi_parse.h
src/gallium/auxiliary/tgsi/tgsi_ppc.c
src/gallium/auxiliary/tgsi/tgsi_sanity.c
src/gallium/auxiliary/tgsi/tgsi_scan.c
src/gallium/auxiliary/tgsi/tgsi_sse2.c
src/gallium/auxiliary/tgsi/tgsi_text.c
src/gallium/auxiliary/tgsi/tgsi_util.c
src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
src/gallium/auxiliary/vl/vl_shader_build.c
src/gallium/drivers/cell/ppu/cell_gen_fp.c
src/gallium/drivers/cell/spu/spu_exec.c
src/gallium/drivers/cell/spu/spu_util.c
src/gallium/drivers/i915/i915_fpc_translate.c
src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
src/gallium/drivers/nv20/nv20_vertprog.c
src/gallium/drivers/nv30/nv30_fragprog.c
src/gallium/drivers/nv30/nv30_vertprog.c
src/gallium/drivers/nv40/nv40_fragprog.c
src/gallium/drivers/nv40/nv40_vertprog.c
src/gallium/drivers/nv50/nv50_program.c
src/gallium/drivers/r300/r300_tgsi_to_rc.c
src/gallium/drivers/svga/svga_tgsi_insn.c

index fe200983ca8f16631bdd6a97287f4eb5f330059f..3bb96161224dbefb6dc31f3d77a6f77c1b768b78 100644 (file)
@@ -270,10 +270,10 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Instruction.NumSrcRegs = 2;
       newInst.Instruction.Texture = TRUE;
       newInst.Texture.Texture = TGSI_TEXTURE_2D;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[0].SrcRegister.Index = aactx->maxInput + 1;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_SAMPLER;
-      newInst.Src[1].SrcRegister.Index = aactx->freeSampler;
+      newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[0].Register.Index = aactx->maxInput + 1;
+      newInst.Src[1].Register.File = TGSI_FILE_SAMPLER;
+      newInst.Src[1].Register.Index = aactx->freeSampler;
 
       ctx->emit_instruction(ctx, &newInst);
 
@@ -285,8 +285,8 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = aactx->colorOutput;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZ;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = aactx->colorTemp;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = aactx->colorTemp;
       ctx->emit_instruction(ctx, &newInst);
 
       /* MUL alpha */
@@ -297,10 +297,10 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = aactx->colorOutput;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = aactx->colorTemp;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[1].SrcRegister.Index = aactx->texTemp;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = aactx->colorTemp;
+      newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[1].Register.Index = aactx->texTemp;
       ctx->emit_instruction(ctx, &newInst);
 
       /* END */
index 39e1406e961b123bed86e93d9bdd230a7a50a46a..75130a8fb0ecb322dd98a68264cf3b0c93dcc3f7 100644 (file)
@@ -238,10 +238,10 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XY;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[0].SrcRegister.Index = texInput;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[1].SrcRegister.Index = texInput;
+      newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[0].Register.Index = texInput;
+      newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[1].Register.Index = texInput;
       ctx->emit_instruction(ctx, &newInst);
 
       /* ADD t0.x, t0.x, t0.y;  # x^2 + y^2 */
@@ -252,12 +252,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[1].SrcRegister.Index = tmp0;
-      newInst.Src[1].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+      newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[1].Register.Index = tmp0;
+      newInst.Src[1].Register.SwizzleX = TGSI_SWIZZLE_Y;
       ctx->emit_instruction(ctx, &newInst);
 
 #if NORMALIZE  /* OPTIONAL normalization of length */
@@ -269,8 +269,8 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
       ctx->emit_instruction(ctx, &newInst);
 
       /* RCP t0.x, t0.x; */
@@ -281,8 +281,8 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
       ctx->emit_instruction(ctx, &newInst);
 #endif
 
@@ -294,12 +294,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[1].SrcRegister.Index = texInput;
-      newInst.Src[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+      newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[1].Register.Index = texInput;
+      newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_W;
       ctx->emit_instruction(ctx, &newInst);
 
       /* KIL -tmp0.yyyy;   # if -tmp0.y < 0, KILL */
@@ -307,13 +307,13 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
       newInst.Instruction.NumDstRegs = 0;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.Negate = 1;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.Negate = 1;
       ctx->emit_instruction(ctx, &newInst);
 
 
@@ -327,12 +327,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[0].SrcRegister.Index = texInput;
-      newInst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[1].SrcRegister.Index = texInput;
-      newInst.Src[1].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z;
+      newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[0].Register.Index = texInput;
+      newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_W;
+      newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[1].Register.Index = texInput;
+      newInst.Src[1].Register.SwizzleZ = TGSI_SWIZZLE_Z;
       ctx->emit_instruction(ctx, &newInst);
 
       /* RCP t0.z, t0.z;  # t0.z = 1 / m */
@@ -343,9 +343,9 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Z;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Z;
       ctx->emit_instruction(ctx, &newInst);
 
       /* SUB t0.y, 1, t0.x;  # d = 1 - d */
@@ -356,12 +356,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[0].SrcRegister.Index = texInput;
-      newInst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[1].SrcRegister.Index = tmp0;
-      newInst.Src[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
+      newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[0].Register.Index = texInput;
+      newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_W;
+      newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[1].Register.Index = tmp0;
+      newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_X;
       ctx->emit_instruction(ctx, &newInst);
 
       /* MUL t0.w, t0.y, t0.z;   # coverage = d * m */
@@ -372,12 +372,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[1].SrcRegister.Index = tmp0;
-      newInst.Src[1].SrcRegister.SwizzleW = TGSI_SWIZZLE_Z;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+      newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[1].Register.Index = tmp0;
+      newInst.Src[1].Register.SwizzleW = TGSI_SWIZZLE_Z;
       ctx->emit_instruction(ctx, &newInst);
 
       /* SLE t0.y, t0.x, tex.z;  # bool b = distance <= k */
@@ -388,12 +388,12 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[1].SrcRegister.Index = texInput;
-      newInst.Src[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_Z;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+      newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[1].Register.Index = texInput;
+      newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_Z;
       ctx->emit_instruction(ctx, &newInst);
 
       /* CMP t0.w, -t0.y, tex.w, t0.w;
@@ -409,25 +409,25 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = tmp0;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
       newInst.Instruction.NumSrcRegs = 3;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = tmp0;
-      newInst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
-      newInst.Src[0].SrcRegister.Negate = 1;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[1].SrcRegister.Index = texInput;
-      newInst.Src[1].SrcRegister.SwizzleX = TGSI_SWIZZLE_W;
-      newInst.Src[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
-      newInst.Src[1].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
-      newInst.Src[1].SrcRegister.SwizzleW = TGSI_SWIZZLE_W;
-      newInst.Src[2].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[2].SrcRegister.Index = tmp0;
-      newInst.Src[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_W;
-      newInst.Src[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
-      newInst.Src[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
-      newInst.Src[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = tmp0;
+      newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+      newInst.Src[0].Register.Negate = 1;
+      newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[1].Register.Index = texInput;
+      newInst.Src[1].Register.SwizzleX = TGSI_SWIZZLE_W;
+      newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_W;
+      newInst.Src[1].Register.SwizzleZ = TGSI_SWIZZLE_W;
+      newInst.Src[1].Register.SwizzleW = TGSI_SWIZZLE_W;
+      newInst.Src[2].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[2].Register.Index = tmp0;
+      newInst.Src[2].Register.SwizzleX = TGSI_SWIZZLE_W;
+      newInst.Src[2].Register.SwizzleY = TGSI_SWIZZLE_W;
+      newInst.Src[2].Register.SwizzleZ = TGSI_SWIZZLE_W;
+      newInst.Src[2].Register.SwizzleW = TGSI_SWIZZLE_W;
       ctx->emit_instruction(ctx, &newInst);
 
    }
@@ -443,8 +443,8 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = aactx->colorOutput;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZ;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = aactx->colorTemp;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = aactx->colorTemp;
       ctx->emit_instruction(ctx, &newInst);
 
       /* MUL result.color.w, colorTemp, tmp0.w; */
@@ -455,10 +455,10 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.Index = aactx->colorOutput;
       newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = aactx->colorTemp;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[1].SrcRegister.Index = aactx->tmp0;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = aactx->colorTemp;
+      newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[1].Register.Index = aactx->tmp0;
       ctx->emit_instruction(ctx, &newInst);
    }
    else {
index 99165b1006ee816632c1a1aa78a04c903e6d820e..45317227a8d040734ff7074fdb3610cec90688c0 100644 (file)
@@ -283,10 +283,10 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
       newInst.Dst[0].Register.Index = pctx->texTemp;
       newInst.Instruction.NumSrcRegs = 2;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_INPUT;
-      newInst.Src[0].SrcRegister.Index = wincoordInput;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_IMMEDIATE;
-      newInst.Src[1].SrcRegister.Index = pctx->numImmed;
+      newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+      newInst.Src[0].Register.Index = wincoordInput;
+      newInst.Src[1].Register.File = TGSI_FILE_IMMEDIATE;
+      newInst.Src[1].Register.Index = pctx->numImmed;
       ctx->emit_instruction(ctx, &newInst);
 
       /* TEX texTemp, texTemp, sampler; */
@@ -298,10 +298,10 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Instruction.NumSrcRegs = 2;
       newInst.Instruction.Texture = TRUE;
       newInst.Texture.Texture = TGSI_TEXTURE_2D;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = pctx->texTemp;
-      newInst.Src[1].SrcRegister.File = TGSI_FILE_SAMPLER;
-      newInst.Src[1].SrcRegister.Index = pctx->freeSampler;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = pctx->texTemp;
+      newInst.Src[1].Register.File = TGSI_FILE_SAMPLER;
+      newInst.Src[1].Register.Index = pctx->freeSampler;
       ctx->emit_instruction(ctx, &newInst);
 
       /* KIL -texTemp;   # if -texTemp < 0, KILL fragment */
@@ -309,9 +309,9 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
       newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
       newInst.Instruction.NumDstRegs = 0;
       newInst.Instruction.NumSrcRegs = 1;
-      newInst.Src[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
-      newInst.Src[0].SrcRegister.Index = pctx->texTemp;
-      newInst.Src[0].SrcRegister.Negate = 1;
+      newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+      newInst.Src[0].Register.Index = pctx->texTemp;
+      newInst.Src[0].Register.Negate = 1;
       ctx->emit_instruction(ctx, &newInst);
    }
 
index 8c93642954b5f30aad3c3624f95eefd726f67349..1aaae4ab7a4eed74924f4953d83557cb1ad82086 100644 (file)
@@ -529,8 +529,8 @@ static struct x86_reg fetch_src( struct aos_compilation *cp,
                                  const struct tgsi_full_src_register *src ) 
 {
    struct x86_reg arg0 = aos_get_shader_reg(cp, 
-                                            src->SrcRegister.File, 
-                                            src->SrcRegister.Index);
+                                            src->Register.File, 
+                                            src->Register.Index);
    unsigned i;
    ubyte swz = 0;
    unsigned negs = 0;
@@ -620,8 +620,8 @@ static void x87_fld_src( struct aos_compilation *cp,
                          unsigned channel ) 
 {
    struct x86_reg arg0 = aos_get_shader_reg_ptr(cp, 
-                                                src->SrcRegister.File, 
-                                                src->SrcRegister.Index);
+                                                src->Register.File, 
+                                                src->Register.Index);
 
    unsigned swizzle = tgsi_util_get_full_src_register_swizzle( src, channel );
    unsigned neg = tgsi_util_get_full_src_register_sign_mode( src, channel );
index 135d307ce1f0798d01033f0098736fd78797a249..5cafe8c3f0c3ec2e02bdd948ea745de38cfe27a0 100644 (file)
@@ -238,22 +238,22 @@ translate_instruction(llvm::Module *module,
       llvm::Value *val = 0;
       llvm::Value *indIdx = 0;
 
-      if (src->SrcRegister.Indirect) {
-         indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+      if (src->Register.Indirect) {
+         indIdx = storage->addrElement(src->Indirect.Index);
          indIdx = storage->extractIndex(indIdx);
       }
-      if (src->SrcRegister.File == TGSI_FILE_CONSTANT) {
-         val = storage->constElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_INPUT) {
-         val = storage->inputElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_TEMPORARY) {
-         val = storage->tempElement(src->SrcRegister.Index);
-      } else if (src->SrcRegister.File == TGSI_FILE_OUTPUT) {
-         val = storage->outputElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
-         val = storage->immediateElement(src->SrcRegister.Index);
+      if (src->Register.File == TGSI_FILE_CONSTANT) {
+         val = storage->constElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_INPUT) {
+         val = storage->inputElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_TEMPORARY) {
+         val = storage->tempElement(src->Register.Index);
+      } else if (src->Register.File == TGSI_FILE_OUTPUT) {
+         val = storage->outputElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_IMMEDIATE) {
+         val = storage->immediateElement(src->Register.Index);
       } else {
-         fprintf(stderr, "ERROR: not supported llvm source %d\n", src->SrcRegister.File);
+         fprintf(stderr, "ERROR: not supported llvm source %d\n", src->Register.File);
          return;
       }
 
@@ -688,11 +688,11 @@ translate_instructionir(llvm::Module *module,
       llvm::Value *indIdx = 0;
       int swizzle = swizzleInt(src);
 
-      if (src->SrcRegister.Indirect) {
-         indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+      if (src->Register.Indirect) {
+         indIdx = storage->addrElement(src->Indirect.Index);
       }
-      val = storage->load((enum tgsi_file_type)src->SrcRegister.File,
-                          src->SrcRegister.Index, swizzle, instr->getIRBuilder(), indIdx);
+      val = storage->load((enum tgsi_file_type)src->Register.File,
+                          src->Register.Index, swizzle, instr->getIRBuilder(), indIdx);
 
       inputs[i] = val;
    }
index 91fb4f68e5f81b21edc07ab47ac791e1d993f606..c35634c69a78db6c885534da17e9f3bf10d99b13 100644 (file)
@@ -623,21 +623,21 @@ tgsi_build_full_instruction(
       size++;
 
       *src_register = tgsi_build_src_register(
-         reg->SrcRegister.File,
-         reg->SrcRegister.SwizzleX,
-         reg->SrcRegister.SwizzleY,
-         reg->SrcRegister.SwizzleZ,
-         reg->SrcRegister.SwizzleW,
-         reg->SrcRegister.Negate,
-         reg->SrcRegister.Absolute,
-         reg->SrcRegister.Indirect,
-         reg->SrcRegister.Dimension,
-         reg->SrcRegister.Index,
+         reg->Register.File,
+         reg->Register.SwizzleX,
+         reg->Register.SwizzleY,
+         reg->Register.SwizzleZ,
+         reg->Register.SwizzleW,
+         reg->Register.Negate,
+         reg->Register.Absolute,
+         reg->Register.Indirect,
+         reg->Register.Dimension,
+         reg->Register.Index,
          instruction,
          header );
       prev_token = (struct tgsi_token  *) src_register;
 
-      if( reg->SrcRegister.Indirect ) {
+      if( reg->Register.Indirect ) {
          struct  tgsi_src_register *ind;
 
          if( maxsize <= size )
@@ -646,24 +646,24 @@ tgsi_build_full_instruction(
          size++;
 
          *ind = tgsi_build_src_register(
-            reg->SrcRegisterInd.File,
-            reg->SrcRegisterInd.SwizzleX,
-            reg->SrcRegisterInd.SwizzleY,
-            reg->SrcRegisterInd.SwizzleZ,
-            reg->SrcRegisterInd.SwizzleW,
-            reg->SrcRegisterInd.Negate,
-            reg->SrcRegisterInd.Absolute,
-            reg->SrcRegisterInd.Indirect,
-            reg->SrcRegisterInd.Dimension,
-            reg->SrcRegisterInd.Index,
+            reg->Indirect.File,
+            reg->Indirect.SwizzleX,
+            reg->Indirect.SwizzleY,
+            reg->Indirect.SwizzleZ,
+            reg->Indirect.SwizzleW,
+            reg->Indirect.Negate,
+            reg->Indirect.Absolute,
+            reg->Indirect.Indirect,
+            reg->Indirect.Dimension,
+            reg->Indirect.Index,
             instruction,
             header );
       }
 
-      if( reg->SrcRegister.Dimension ) {
+      if( reg->Register.Dimension ) {
          struct  tgsi_dimension *dim;
 
-         assert( !reg->SrcRegisterDim.Dimension );
+         assert( !reg->Dimension.Dimension );
 
          if( maxsize <= size )
             return 0;
@@ -671,12 +671,12 @@ tgsi_build_full_instruction(
          size++;
 
          *dim = tgsi_build_dimension(
-            reg->SrcRegisterDim.Indirect,
-            reg->SrcRegisterDim.Index,
+            reg->Dimension.Indirect,
+            reg->Dimension.Index,
             instruction,
             header );
 
-         if( reg->SrcRegisterDim.Indirect ) {
+         if( reg->Dimension.Indirect ) {
             struct tgsi_src_register *ind;
 
             if( maxsize <= size )
@@ -685,16 +685,16 @@ tgsi_build_full_instruction(
             size++;
 
             *ind = tgsi_build_src_register(
-               reg->SrcRegisterDimInd.File,
-               reg->SrcRegisterDimInd.SwizzleX,
-               reg->SrcRegisterDimInd.SwizzleY,
-               reg->SrcRegisterDimInd.SwizzleZ,
-               reg->SrcRegisterDimInd.SwizzleW,
-               reg->SrcRegisterDimInd.Negate,
-               reg->SrcRegisterDimInd.Absolute,
-               reg->SrcRegisterDimInd.Indirect,
-               reg->SrcRegisterDimInd.Dimension,
-               reg->SrcRegisterDimInd.Index,
+               reg->DimIndirect.File,
+               reg->DimIndirect.SwizzleX,
+               reg->DimIndirect.SwizzleY,
+               reg->DimIndirect.SwizzleZ,
+               reg->DimIndirect.SwizzleW,
+               reg->DimIndirect.Negate,
+               reg->DimIndirect.Absolute,
+               reg->DimIndirect.Indirect,
+               reg->DimIndirect.Dimension,
+               reg->DimIndirect.Index,
                instruction,
                header );
          }
@@ -894,10 +894,10 @@ tgsi_default_full_src_register( void )
 {
    struct tgsi_full_src_register full_src_register;
 
-   full_src_register.SrcRegister = tgsi_default_src_register();
-   full_src_register.SrcRegisterInd = tgsi_default_src_register();
-   full_src_register.SrcRegisterDim = tgsi_default_dimension();
-   full_src_register.SrcRegisterDimInd = tgsi_default_src_register();
+   full_src_register.Register = tgsi_default_src_register();
+   full_src_register.Indirect = tgsi_default_src_register();
+   full_src_register.Dimension = tgsi_default_dimension();
+   full_src_register.DimIndirect = tgsi_default_src_register();
 
    return full_src_register;
 }
index 6141865f0365a9527876a24724775006c7f531dc..da126f3b012db94fda0e29eeeb881d9ea8cc69e5 100644 (file)
@@ -386,42 +386,42 @@ iter_instruction(
          CHR( ',' );
       CHR( ' ' );
 
-      if (src->SrcRegister.Negate)
+      if (src->Register.Negate)
          TXT( "-(" );
-      if (src->SrcRegister.Absolute)
+      if (src->Register.Absolute)
          CHR( '|' );
 
-      if (src->SrcRegister.Indirect) {
+      if (src->Register.Indirect) {
          _dump_register_ind(
             ctx,
-            src->SrcRegister.File,
-            src->SrcRegister.Index,
-            src->SrcRegisterInd.File,
-            src->SrcRegisterInd.Index,
-            src->SrcRegisterInd.SwizzleX );
+            src->Register.File,
+            src->Register.Index,
+            src->Indirect.File,
+            src->Indirect.Index,
+            src->Indirect.SwizzleX );
       }
       else {
          _dump_register(
             ctx,
-            src->SrcRegister.File,
-            src->SrcRegister.Index,
-            src->SrcRegister.Index );
+            src->Register.File,
+            src->Register.Index,
+            src->Register.Index );
       }
 
-      if (src->SrcRegister.SwizzleX != TGSI_SWIZZLE_X ||
-          src->SrcRegister.SwizzleY != TGSI_SWIZZLE_Y ||
-          src->SrcRegister.SwizzleZ != TGSI_SWIZZLE_Z ||
-          src->SrcRegister.SwizzleW != TGSI_SWIZZLE_W) {
+      if (src->Register.SwizzleX != TGSI_SWIZZLE_X ||
+          src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
+          src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
+          src->Register.SwizzleW != TGSI_SWIZZLE_W) {
          CHR( '.' );
-         ENM( src->SrcRegister.SwizzleX, swizzle_names );
-         ENM( src->SrcRegister.SwizzleY, swizzle_names );
-         ENM( src->SrcRegister.SwizzleZ, swizzle_names );
-         ENM( src->SrcRegister.SwizzleW, swizzle_names );
+         ENM( src->Register.SwizzleX, swizzle_names );
+         ENM( src->Register.SwizzleY, swizzle_names );
+         ENM( src->Register.SwizzleZ, swizzle_names );
+         ENM( src->Register.SwizzleW, swizzle_names );
       }
 
-      if (src->SrcRegister.Absolute)
+      if (src->Register.Absolute)
          CHR( '|' );
-      if (src->SrcRegister.Negate)
+      if (src->Register.Negate)
          CHR( ')' );
 
       first_reg = FALSE;
index 5fae5a225feb2925356333ffd42c27d9506a4799..77f671e9eb6f11e9189f0b9b5727f6c5e87e7c89 100644 (file)
@@ -392,78 +392,78 @@ dump_instruction_verbose(
 
       EOL();
       TXT( "\nFile     : ");
-      ENM( src->SrcRegister.File, TGSI_FILES );
-      if( deflt || fs->SrcRegister.SwizzleX != src->SrcRegister.SwizzleX ) {
+      ENM( src->Register.File, TGSI_FILES );
+      if( deflt || fs->Register.SwizzleX != src->Register.SwizzleX ) {
          TXT( "\nSwizzleX : " );
-         ENM( src->SrcRegister.SwizzleX, TGSI_SWIZZLES );
+         ENM( src->Register.SwizzleX, TGSI_SWIZZLES );
       }
-      if( deflt || fs->SrcRegister.SwizzleY != src->SrcRegister.SwizzleY ) {
+      if( deflt || fs->Register.SwizzleY != src->Register.SwizzleY ) {
          TXT( "\nSwizzleY : " );
-         ENM( src->SrcRegister.SwizzleY, TGSI_SWIZZLES );
+         ENM( src->Register.SwizzleY, TGSI_SWIZZLES );
       }
-      if( deflt || fs->SrcRegister.SwizzleZ != src->SrcRegister.SwizzleZ ) {
+      if( deflt || fs->Register.SwizzleZ != src->Register.SwizzleZ ) {
          TXT( "\nSwizzleZ : " );
-         ENM( src->SrcRegister.SwizzleZ, TGSI_SWIZZLES );
+         ENM( src->Register.SwizzleZ, TGSI_SWIZZLES );
       }
-      if( deflt || fs->SrcRegister.SwizzleW != src->SrcRegister.SwizzleW ) {
+      if( deflt || fs->Register.SwizzleW != src->Register.SwizzleW ) {
          TXT( "\nSwizzleW : " );
-         ENM( src->SrcRegister.SwizzleW, TGSI_SWIZZLES );
+         ENM( src->Register.SwizzleW, TGSI_SWIZZLES );
       }
-      if( deflt || fs->SrcRegister.Negate != src->SrcRegister.Negate ) {
+      if( deflt || fs->Register.Negate != src->Register.Negate ) {
          TXT( "\nNegate   : " );
-         UID( src->SrcRegister.Negate );
+         UID( src->Register.Negate );
       }
       if( ignored ) {
-         if( deflt || fs->SrcRegister.Indirect != src->SrcRegister.Indirect ) {
+         if( deflt || fs->Register.Indirect != src->Register.Indirect ) {
             TXT( "\nIndirect : " );
-            UID( src->SrcRegister.Indirect );
+            UID( src->Register.Indirect );
          }
-         if( deflt || fs->SrcRegister.Dimension != src->SrcRegister.Dimension ) {
+         if( deflt || fs->Register.Dimension != src->Register.Dimension ) {
             TXT( "\nDimension: " );
-            UID( src->SrcRegister.Dimension );
+            UID( src->Register.Dimension );
          }
       }
-      if( deflt || fs->SrcRegister.Index != src->SrcRegister.Index ) {
+      if( deflt || fs->Register.Index != src->Register.Index ) {
          TXT( "\nIndex    : " );
-         SID( src->SrcRegister.Index );
+         SID( src->Register.Index );
       }
       if( ignored ) {
-         if( deflt || fs->SrcRegister.Extended != src->SrcRegister.Extended ) {
+         if( deflt || fs->Register.Extended != src->Register.Extended ) {
             TXT( "\nExtended : " );
-            UID( src->SrcRegister.Extended );
+            UID( src->Register.Extended );
          }
       }
 
-      if( deflt || tgsi_compare_src_register_ext_mod( src->SrcRegisterExtMod, fs->SrcRegisterExtMod ) ) {
+      if( deflt || tgsi_compare_src_register_ext_mod( src->RegisterExtMod, fs->RegisterExtMod ) ) {
          EOL();
          TXT( "\nType     : " );
-         ENM( src->SrcRegisterExtMod.Type, TGSI_SRC_REGISTER_EXTS );
-         if( deflt || fs->SrcRegisterExtMod.Complement != src->SrcRegisterExtMod.Complement ) {
+         ENM( src->RegisterExtMod.Type, TGSI_SRC_REGISTER_EXTS );
+         if( deflt || fs->RegisterExtMod.Complement != src->RegisterExtMod.Complement ) {
             TXT( "\nComplement: " );
-            UID( src->SrcRegisterExtMod.Complement );
+            UID( src->RegisterExtMod.Complement );
          }
-         if( deflt || fs->SrcRegisterExtMod.Bias != src->SrcRegisterExtMod.Bias ) {
+         if( deflt || fs->RegisterExtMod.Bias != src->RegisterExtMod.Bias ) {
             TXT( "\nBias     : " );
-            UID( src->SrcRegisterExtMod.Bias );
+            UID( src->RegisterExtMod.Bias );
          }
-         if( deflt || fs->SrcRegisterExtMod.Scale2X != src->SrcRegisterExtMod.Scale2X ) {
+         if( deflt || fs->RegisterExtMod.Scale2X != src->RegisterExtMod.Scale2X ) {
             TXT( "\nScale2X   : " );
-            UID( src->SrcRegisterExtMod.Scale2X );
+            UID( src->RegisterExtMod.Scale2X );
          }
-         if( deflt || fs->SrcRegisterExtMod.Absolute != src->SrcRegisterExtMod.Absolute ) {
+         if( deflt || fs->RegisterExtMod.Absolute != src->RegisterExtMod.Absolute ) {
             TXT( "\nAbsolute  : " );
-            UID( src->SrcRegisterExtMod.Absolute );
+            UID( src->RegisterExtMod.Absolute );
          }
-         if( deflt || fs->SrcRegisterExtMod.Negate != src->SrcRegisterExtMod.Negate ) {
+         if( deflt || fs->RegisterExtMod.Negate != src->RegisterExtMod.Negate ) {
             TXT( "\nNegate   : " );
-            UID( src->SrcRegisterExtMod.Negate );
+            UID( src->RegisterExtMod.Negate );
          }
          if( ignored ) {
             TXT( "\nPadding   : " );
-            UIX( src->SrcRegisterExtMod.Padding );
-            if( deflt || fs->SrcRegisterExtMod.Extended != src->SrcRegisterExtMod.Extended ) {
+            UIX( src->RegisterExtMod.Padding );
+            if( deflt || fs->RegisterExtMod.Extended != src->RegisterExtMod.Extended ) {
                TXT( "\nExtended  : " );
-               UID( src->SrcRegisterExtMod.Extended );
+               UID( src->RegisterExtMod.Extended );
             }
          }
       }
index a6bd1a784f77e1ce3f0f2ea26d4417d2b1577851..6cd23b37be6ad7a843330de273490f1026af990c 100644 (file)
@@ -200,9 +200,9 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
 
    /* loop over src regs */
    for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
-      if ((inst->Src[i].SrcRegister.File ==
+      if ((inst->Src[i].Register.File ==
            inst->Dst[0].Register.File) &&
-          (inst->Src[i].SrcRegister.Index ==
+          (inst->Src[i].Register.Index ==
            inst->Dst[0].Register.Index)) {
          /* loop over dest channels */
          uint channelsWritten = 0x0;
@@ -1233,13 +1233,13 @@ fetch_source(
     *
     *    file[1],
     *    where:
-    *       file = SrcRegister.File
-    *       [1] = SrcRegister.Index
+    *       file = Register.File
+    *       [1] = Register.Index
     */
    index.i[0] =
    index.i[1] =
    index.i[2] =
-   index.i[3] = reg->SrcRegister.Index;
+   index.i[3] = reg->Register.Index;
 
    /* There is an extra source register that indirectly subscripts
     * a register file. The direct index now becomes an offset
@@ -1247,11 +1247,11 @@ fetch_source(
     *
     *    file[ind[2].x+1],
     *    where:
-    *       ind = SrcRegisterInd.File
-    *       [2] = SrcRegisterInd.Index
-    *       .x = SrcRegisterInd.SwizzleX
+    *       ind = Indirect.File
+    *       [2] = Indirect.Index
+    *       .x = Indirect.SwizzleX
     */
-   if (reg->SrcRegister.Indirect) {
+   if (reg->Register.Indirect) {
       union tgsi_exec_channel index2;
       union tgsi_exec_channel indir_index;
       const uint execmask = mach->ExecMask;
@@ -1261,13 +1261,13 @@ fetch_source(
       index2.i[0] =
       index2.i[1] =
       index2.i[2] =
-      index2.i[3] = reg->SrcRegisterInd.Index;
+      index2.i[3] = reg->Indirect.Index;
 
       /* get current value of address register[swizzle] */
-      swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterInd, CHAN_X );
+      swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
       fetch_src_file_channel(
          mach,
-         reg->SrcRegisterInd.File,
+         reg->Indirect.File,
          swizzle,
          &index2,
          &indir_index );
@@ -1293,14 +1293,14 @@ fetch_source(
     *
     *    file[1][3] == file[1*sizeof(file[1])+3],
     *    where:
-    *       [3] = SrcRegisterDim.Index
+    *       [3] = Dimension.Index
     */
-   if (reg->SrcRegister.Dimension) {
+   if (reg->Register.Dimension) {
       /* The size of the first-order array depends on the register file type.
        * We need to multiply the index to the first array to get an effective,
        * "flat" index that points to the beginning of the second-order array.
        */
-      switch (reg->SrcRegister.File) {
+      switch (reg->Register.File) {
       case TGSI_FILE_INPUT:
          index.i[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
          index.i[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
@@ -1317,10 +1317,10 @@ fetch_source(
          assert( 0 );
       }
 
-      index.i[0] += reg->SrcRegisterDim.Index;
-      index.i[1] += reg->SrcRegisterDim.Index;
-      index.i[2] += reg->SrcRegisterDim.Index;
-      index.i[3] += reg->SrcRegisterDim.Index;
+      index.i[0] += reg->Dimension.Index;
+      index.i[1] += reg->Dimension.Index;
+      index.i[2] += reg->Dimension.Index;
+      index.i[3] += reg->Dimension.Index;
 
       /* Again, the second subscript index can be addressed indirectly
        * identically to the first one.
@@ -1329,11 +1329,11 @@ fetch_source(
        *
        *    file[1][ind[4].y+3],
        *    where:
-       *       ind = SrcRegisterDimInd.File
-       *       [4] = SrcRegisterDimInd.Index
-       *       .y = SrcRegisterDimInd.SwizzleX
+       *       ind = DimIndirect.File
+       *       [4] = DimIndirect.Index
+       *       .y = DimIndirect.SwizzleX
        */
-      if (reg->SrcRegisterDim.Indirect) {
+      if (reg->Dimension.Indirect) {
          union tgsi_exec_channel index2;
          union tgsi_exec_channel indir_index;
          const uint execmask = mach->ExecMask;
@@ -1342,12 +1342,12 @@ fetch_source(
          index2.i[0] =
          index2.i[1] =
          index2.i[2] =
-         index2.i[3] = reg->SrcRegisterDimInd.Index;
+         index2.i[3] = reg->DimIndirect.Index;
 
-         swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterDimInd, CHAN_X );
+         swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
          fetch_src_file_channel(
             mach,
-            reg->SrcRegisterDimInd.File,
+            reg->DimIndirect.File,
             swizzle,
             &index2,
             &indir_index );
@@ -1367,7 +1367,7 @@ fetch_source(
       }
 
       /* If by any chance there was a need for a 3D array of register
-       * files, we would have to check whether SrcRegisterDim is followed
+       * files, we would have to check whether Dimension is followed
        * by a dimension register and continue the saga.
        */
    }
@@ -1375,7 +1375,7 @@ fetch_source(
    swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
    fetch_src_file_channel(
       mach,
-      reg->SrcRegister.File,
+      reg->Register.File,
       swizzle,
       &index,
       chan );
@@ -1668,7 +1668,7 @@ exec_tex(struct tgsi_exec_machine *mach,
          boolean biasLod,
          boolean projected)
 {
-   const uint unit = inst->Src[1].SrcRegister.Index;
+   const uint unit = inst->Src[1].Register.Index;
    union tgsi_exec_channel r[4];
    uint chan_index;
    float lodBias;
@@ -1765,7 +1765,7 @@ static void
 exec_txd(struct tgsi_exec_machine *mach,
          const struct tgsi_full_instruction *inst)
 {
-   const uint unit = inst->Src[3].SrcRegister.Index;
+   const uint unit = inst->Src[3].Register.Index;
    union tgsi_exec_channel r[4];
    uint chan_index;
 
index e3a6bc0f543b2361ed7fc30c546c8f9730700177..4b252915c90e0e7fdb9ec66b5a6dd08e3c328036 100644 (file)
@@ -190,34 +190,34 @@ tgsi_parse_token(
 
       for( i = 0; i < inst->Instruction.NumSrcRegs; i++ ) {
 
-         next_token( ctx, &inst->Src[i].SrcRegister );
+         next_token( ctx, &inst->Src[i].Register );
 
-         if( inst->Src[i].SrcRegister.Indirect ) {
-            next_token( ctx, &inst->Src[i].SrcRegisterInd );
+         if( inst->Src[i].Register.Indirect ) {
+            next_token( ctx, &inst->Src[i].Indirect );
 
             /*
              * No support for indirect or multi-dimensional addressing.
              */
-            assert( !inst->Src[i].SrcRegisterInd.Indirect );
-            assert( !inst->Src[i].SrcRegisterInd.Dimension );
+            assert( !inst->Src[i].Indirect.Indirect );
+            assert( !inst->Src[i].Indirect.Dimension );
          }
 
-         if( inst->Src[i].SrcRegister.Dimension ) {
-            next_token( ctx, &inst->Src[i].SrcRegisterDim );
+         if( inst->Src[i].Register.Dimension ) {
+            next_token( ctx, &inst->Src[i].Dimension );
 
             /*
              * No support for multi-dimensional addressing.
              */
-            assert( !inst->Src[i].SrcRegisterDim.Dimension );
+            assert( !inst->Src[i].Dimension.Dimension );
 
-            if( inst->Src[i].SrcRegisterDim.Indirect ) {
-               next_token( ctx, &inst->Src[i].SrcRegisterDimInd );
+            if( inst->Src[i].Dimension.Indirect ) {
+               next_token( ctx, &inst->Src[i].DimIndirect );
 
                /*
                * No support for indirect or multi-dimensional addressing.
                */
-               assert( !inst->Src[i].SrcRegisterInd.Indirect );
-               assert( !inst->Src[i].SrcRegisterInd.Dimension );
+               assert( !inst->Src[i].Indirect.Indirect );
+               assert( !inst->Src[i].Indirect.Dimension );
             }
          }
       }
index 331a533dd9e4b430fa804e2be269c101493e2427..e9efa3fdd9a5bd9baf50da3c3411f6532ae0de94 100644 (file)
@@ -53,10 +53,10 @@ struct tgsi_full_dst_register
 
 struct tgsi_full_src_register
 {
-   struct tgsi_src_register         SrcRegister;
-   struct tgsi_src_register         SrcRegisterInd;
-   struct tgsi_dimension            SrcRegisterDim;
-   struct tgsi_src_register         SrcRegisterDimInd;
+   struct tgsi_src_register         Register;
+   struct tgsi_src_register         Indirect;
+   struct tgsi_dimension            Dimension;
+   struct tgsi_src_register         DimIndirect;
 };
 
 struct tgsi_full_declaration
index adb16f6ac9d4bb57519fd4f877f04a6f88e26e1e..da6ad6da04ce7176b5da9abc887aaf48e061921a 100644 (file)
@@ -156,8 +156,8 @@ init_gen_context(struct gen_context *gen, struct ppc_function *func)
 static boolean
 is_ppc_vec_temporary(const struct tgsi_full_src_register *reg)
 {
-   return (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
-           reg->SrcRegister.Index < MAX_PPC_TEMPS);
+   return (reg->Register.File == TGSI_FILE_TEMPORARY &&
+           reg->Register.Index < MAX_PPC_TEMPS);
 }
 
 
@@ -291,10 +291,10 @@ emit_fetch(struct gen_context *gen,
    case TGSI_SWIZZLE_Y:
    case TGSI_SWIZZLE_Z:
    case TGSI_SWIZZLE_W:
-      switch (reg->SrcRegister.File) {
+      switch (reg->Register.File) {
       case TGSI_FILE_INPUT:
          {
-            int offset = (reg->SrcRegister.Index * 4 + swizzle) * 16;
+            int offset = (reg->Register.Index * 4 + swizzle) * 16;
             int offset_reg = emit_li_offset(gen, offset);
             dst_vec = ppc_allocate_vec_register(gen->f);
             ppc_lvx(gen->f, dst_vec, gen->inputs_reg, offset_reg);
@@ -303,11 +303,11 @@ emit_fetch(struct gen_context *gen,
       case TGSI_FILE_TEMPORARY:
          if (is_ppc_vec_temporary(reg)) {
             /* use PPC vec register */
-            dst_vec = gen->temps_map[reg->SrcRegister.Index][swizzle];
+            dst_vec = gen->temps_map[reg->Register.Index][swizzle];
          }
          else {
             /* use memory-based temp register "file" */
-            int offset = (reg->SrcRegister.Index * 4 + swizzle) * 16;
+            int offset = (reg->Register.Index * 4 + swizzle) * 16;
             int offset_reg = emit_li_offset(gen, offset);
             dst_vec = ppc_allocate_vec_register(gen->f);
             ppc_lvx(gen->f, dst_vec, gen->temps_reg, offset_reg);
@@ -315,7 +315,7 @@ emit_fetch(struct gen_context *gen,
          break;
       case TGSI_FILE_IMMEDIATE:
          {
-            int offset = (reg->SrcRegister.Index * 4 + swizzle) * 4;
+            int offset = (reg->Register.Index * 4 + swizzle) * 4;
             int offset_reg = emit_li_offset(gen, offset);
             dst_vec = ppc_allocate_vec_register(gen->f);
             /* Load 4-byte word into vector register.
@@ -331,7 +331,7 @@ emit_fetch(struct gen_context *gen,
          break;
       case TGSI_FILE_CONSTANT:
          {
-            int offset = (reg->SrcRegister.Index * 4 + swizzle) * 4;
+            int offset = (reg->Register.Index * 4 + swizzle) * 4;
             int offset_reg = emit_li_offset(gen, offset);
             dst_vec = ppc_allocate_vec_register(gen->f);
             /* Load 4-byte word into vector register.
@@ -404,9 +404,9 @@ equal_src_locs(const struct tgsi_full_src_register *a, uint chan_a,
 {
    int swz_a, swz_b;
    int sign_a, sign_b;
-   if (a->SrcRegister.File != b->SrcRegister.File)
+   if (a->Register.File != b->Register.File)
       return FALSE;
-   if (a->SrcRegister.Index != b->SrcRegister.Index)
+   if (a->Register.Index != b->Register.Index)
       return FALSE;
    swz_a = tgsi_util_get_full_src_register_swizzle(a, chan_a);
    swz_b = tgsi_util_get_full_src_register_swizzle(b, chan_b);
index 7e50e25353af6b186e096e11de96df00068ddb02..8bd1f31e9ce84f746fd56429fdff6c6b5dfc522e 100644 (file)
@@ -220,16 +220,16 @@ iter_instruction(
    for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
       check_register_usage(
          ctx,
-         inst->Src[i].SrcRegister.File,
-         inst->Src[i].SrcRegister.Index,
+         inst->Src[i].Register.File,
+         inst->Src[i].Register.Index,
          "source",
-         (boolean)inst->Src[i].SrcRegister.Indirect );
-      if (inst->Src[i].SrcRegister.Indirect) {
+         (boolean)inst->Src[i].Register.Indirect );
+      if (inst->Src[i].Register.Indirect) {
          uint file;
          int index;
 
-         file = inst->Src[i].SrcRegisterInd.File;
-         index = inst->Src[i].SrcRegisterInd.Index;
+         file = inst->Src[i].Indirect.File;
+         index = inst->Src[i].Indirect.Index;
          check_register_usage(
             ctx,
             file,
@@ -254,8 +254,8 @@ iter_instruction(
 
    switch (inst->Instruction.Opcode) {
    case TGSI_OPCODE_BGNFOR:
-      if (inst->Src[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
-          inst->Src[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
+      if (inst->Src[0].Register.File != TGSI_FILE_CONSTANT &&
+          inst->Src[0].Register.File != TGSI_FILE_IMMEDIATE) {
          report_error(ctx, "Source register file must be either CONST or IMM");
       }
       break;
index 90832e71bb2b9775923eb08edeb296de7737754f..a5d2db04ec1f8f8c2302c024848269ccf3b7115f 100644 (file)
@@ -97,13 +97,13 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
                for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
                   const struct tgsi_full_src_register *src =
                      &fullinst->Src[i];
-                  if (src->SrcRegister.File == TGSI_FILE_INPUT) {
-                     const int ind = src->SrcRegister.Index;
+                  if (src->Register.File == TGSI_FILE_INPUT) {
+                     const int ind = src->Register.Index;
                      if (info->input_semantic_name[ind] == TGSI_SEMANTIC_FOG) {
-                        if (src->SrcRegister.SwizzleX == TGSI_SWIZZLE_X) {
+                        if (src->Register.SwizzleX == TGSI_SWIZZLE_X) {
                            info->uses_fogcoord = TRUE;
                         }
-                        else if (src->SrcRegister.SwizzleX == TGSI_SWIZZLE_Y) {
+                        else if (src->Register.SwizzleX == TGSI_SWIZZLE_Y) {
                            info->uses_frontfacing = TRUE;
                         }
                      }
@@ -211,17 +211,17 @@ tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
 
             /* Do a whole bunch of checks for a simple move */
             if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
-                src->SrcRegister.File != TGSI_FILE_INPUT ||
+                src->Register.File != TGSI_FILE_INPUT ||
                 dst->Register.File != TGSI_FILE_OUTPUT ||
-                src->SrcRegister.Index != dst->Register.Index ||
+                src->Register.Index != dst->Register.Index ||
 
-                src->SrcRegister.Negate ||
-                src->SrcRegister.Absolute ||
+                src->Register.Negate ||
+                src->Register.Absolute ||
 
-                src->SrcRegister.SwizzleX != TGSI_SWIZZLE_X ||
-                src->SrcRegister.SwizzleY != TGSI_SWIZZLE_Y ||
-                src->SrcRegister.SwizzleZ != TGSI_SWIZZLE_Z ||
-                src->SrcRegister.SwizzleW != TGSI_SWIZZLE_W ||
+                src->Register.SwizzleX != TGSI_SWIZZLE_X ||
+                src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
+                src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
+                src->Register.SwizzleW != TGSI_SWIZZLE_W ||
 
                 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
             {
index 785076a52084ea93ecc671b555942f519a032092..76051ea0d8e0b81a1ff626f713c9b5565603fab4 100644 (file)
@@ -1267,23 +1267,23 @@ emit_fetch(
    case TGSI_SWIZZLE_Y:
    case TGSI_SWIZZLE_Z:
    case TGSI_SWIZZLE_W:
-      switch (reg->SrcRegister.File) {
+      switch (reg->Register.File) {
       case TGSI_FILE_CONSTANT:
          emit_const(
             func,
             xmm,
-            reg->SrcRegister.Index,
+            reg->Register.Index,
             swizzle,
-            reg->SrcRegister.Indirect,
-            reg->SrcRegisterInd.File,
-            reg->SrcRegisterInd.Index );
+            reg->Register.Indirect,
+            reg->Indirect.File,
+            reg->Indirect.Index );
          break;
 
       case TGSI_FILE_IMMEDIATE:
          emit_immediate(
             func,
             xmm,
-            reg->SrcRegister.Index,
+            reg->Register.Index,
             swizzle );
          break;
 
@@ -1291,7 +1291,7 @@ emit_fetch(
          emit_inputf(
             func,
             xmm,
-            reg->SrcRegister.Index,
+            reg->Register.Index,
             swizzle );
          break;
 
@@ -1299,7 +1299,7 @@ emit_fetch(
          emit_tempf(
             func,
             xmm,
-            reg->SrcRegister.Index,
+            reg->Register.Index,
             swizzle );
          break;
 
@@ -1459,7 +1459,7 @@ emit_tex( struct x86_function *func,
           boolean lodbias,
           boolean projected)
 {
-   const uint unit = inst->Src[1].SrcRegister.Index;
+   const uint unit = inst->Src[1].Register.Index;
    struct x86_reg args[2];
    unsigned count;
    unsigned i;
@@ -1721,8 +1721,8 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
    uint i;
    for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
       const struct tgsi_full_src_register *reg = &inst->Src[i];
-      if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
-          reg->SrcRegister.Indirect)
+      if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+          reg->Register.Indirect)
          return TRUE;
    }
    for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
index 27b90f5ab7bad8d0959554e518987f5fc1788b3a..ca2e2bae1195eca9945c5d47d5eab2c28cbb98c4 100644 (file)
@@ -565,41 +565,41 @@ parse_src_operand(
    if (*ctx->cur == '-') {
       ctx->cur++;
       eat_opt_white( &ctx->cur );
-      src->SrcRegister.Negate = 1;
+      src->Register.Negate = 1;
    }
    
    if (*ctx->cur == '|') {
       ctx->cur++;
       eat_opt_white( &ctx->cur );
-      src->SrcRegister.Absolute = 1;
+      src->Register.Absolute = 1;
    }
 
    if (!parse_register_src(ctx, &file, &index, &ind_file, &ind_index, &ind_comp))
       return FALSE;
-   src->SrcRegister.File = file;
-   src->SrcRegister.Index = index;
+   src->Register.File = file;
+   src->Register.Index = index;
    if (ind_file != TGSI_FILE_NULL) {
-      src->SrcRegister.Indirect = 1;
-      src->SrcRegisterInd.File = ind_file;
-      src->SrcRegisterInd.Index = ind_index;
-      src->SrcRegisterInd.SwizzleX = ind_comp;
-      src->SrcRegisterInd.SwizzleY = ind_comp;
-      src->SrcRegisterInd.SwizzleZ = ind_comp;
-      src->SrcRegisterInd.SwizzleW = ind_comp;
+      src->Register.Indirect = 1;
+      src->Indirect.File = ind_file;
+      src->Indirect.Index = ind_index;
+      src->Indirect.SwizzleX = ind_comp;
+      src->Indirect.SwizzleY = ind_comp;
+      src->Indirect.SwizzleZ = ind_comp;
+      src->Indirect.SwizzleW = ind_comp;
    }
 
    /* Parse optional swizzle.
     */
    if (parse_optional_swizzle( ctx, swizzle, &parsed_swizzle )) {
       if (parsed_swizzle) {
-         src->SrcRegister.SwizzleX = swizzle[0];
-         src->SrcRegister.SwizzleY = swizzle[1];
-         src->SrcRegister.SwizzleZ = swizzle[2];
-         src->SrcRegister.SwizzleW = swizzle[3];
+         src->Register.SwizzleX = swizzle[0];
+         src->Register.SwizzleY = swizzle[1];
+         src->Register.SwizzleZ = swizzle[2];
+         src->Register.SwizzleW = swizzle[3];
       }
    }
 
-   if (src->SrcRegister.Absolute) {
+   if (src->Register.Absolute) {
       eat_opt_white( &ctx->cur );
       if (*ctx->cur != '|') {
          report_error( ctx, "Expected `|'" );
index 3544011b47202e4ce5eb66cfd0334ef8f5e096a5..f4ca9e21ed95cc7686cd34e2f00465ea00525991 100644 (file)
@@ -76,7 +76,7 @@ tgsi_util_get_full_src_register_swizzle(
    unsigned component )
 {
    return tgsi_util_get_src_register_swizzle(
-      &reg->SrcRegister,
+      &reg->Register,
       component );
 }
 
@@ -111,10 +111,10 @@ tgsi_util_get_full_src_register_sign_mode(
 {
    unsigned sign_mode;
 
-   if( reg->SrcRegister.Absolute ) {
+   if( reg->Register.Absolute ) {
       /* Consider only the post-abs negation. */
 
-      if( reg->SrcRegister.Negate ) {
+      if( reg->Register.Negate ) {
          sign_mode = TGSI_UTIL_SIGN_SET;
       }
       else {
@@ -122,7 +122,7 @@ tgsi_util_get_full_src_register_sign_mode(
       }
    }
    else {
-      if( reg->SrcRegister.Negate ) {
+      if( reg->Register.Negate ) {
          sign_mode = TGSI_UTIL_SIGN_TOGGLE;
       }
       else {
@@ -141,23 +141,23 @@ tgsi_util_set_full_src_register_sign_mode(
    switch (sign_mode)
    {
    case TGSI_UTIL_SIGN_CLEAR:
-      reg->SrcRegister.Negate = 0;
-      reg->SrcRegister.Absolute = 1;
+      reg->Register.Negate = 0;
+      reg->Register.Absolute = 1;
       break;
 
    case TGSI_UTIL_SIGN_SET:
-      reg->SrcRegister.Absolute = 1;
-      reg->SrcRegister.Negate = 1;
+      reg->Register.Absolute = 1;
+      reg->Register.Negate = 1;
       break;
 
    case TGSI_UTIL_SIGN_TOGGLE:
-      reg->SrcRegister.Negate = 1;
-      reg->SrcRegister.Absolute = 0;
+      reg->Register.Negate = 1;
+      reg->Register.Absolute = 0;
       break;
 
    case TGSI_UTIL_SIGN_KEEP:
-      reg->SrcRegister.Negate = 0;
-      reg->SrcRegister.Absolute = 0;
+      reg->Register.Negate = 0;
+      reg->Register.Absolute = 0;
       break;
 
    default:
index 4564a6c67feca66f2f83ae01de772a3a9e3fc2cc..36a7987099a352e008f696e438ccb0ee891ae117 100644 (file)
@@ -237,9 +237,9 @@ create_intra_frag_shader(struct vl_mpeg12_mc_renderer *r)
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
 
       inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
-      inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
       inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
    }
@@ -415,9 +415,9 @@ create_frame_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
 
       inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
-      inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
       inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
    }
@@ -620,9 +620,9 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
 
       inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
-      inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-      inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+      inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
       inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
       ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
    }
@@ -642,10 +642,10 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
 
    /* lerp t1, c1.x, t1, t2        ; Blend past and future texels */
    inst = vl_inst4(TGSI_OPCODE_LRP, TGSI_FILE_TEMPORARY, 1, TGSI_FILE_CONSTANT, 1, TGSI_FILE_TEMPORARY, 1, TGSI_FILE_TEMPORARY, 2);
-   inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
-   inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
-   inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
-   inst.Src[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_X;
+   inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+   inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+   inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
+   inst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_X;
    ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
 
    /* add o0, t0, t1               ; Add past/future ref and differential to form final output */
index 9ebb4a9171a4c90f114907922950861e48489f6c..d011ef97bd63815b1ef67026a0ef61cc39f90726 100644 (file)
@@ -141,8 +141,8 @@ struct tgsi_full_instruction vl_inst2
    inst.Dst[0].Register.File = dst_file;
    inst.Dst[0].Register.Index = dst_index;
    inst.Instruction.NumSrcRegs = 1;
-   inst.Src[0].SrcRegister.File = src_file;
-   inst.Src[0].SrcRegister.Index = src_index;
+   inst.Src[0].Register.File = src_file;
+   inst.Src[0].Register.Index = src_index;
 
    return inst;
 }
@@ -165,10 +165,10 @@ struct tgsi_full_instruction vl_inst3
    inst.Dst[0].Register.File = dst_file;
    inst.Dst[0].Register.Index = dst_index;
    inst.Instruction.NumSrcRegs = 2;
-   inst.Src[0].SrcRegister.File = src1_file;
-   inst.Src[0].SrcRegister.Index = src1_index;
-   inst.Src[1].SrcRegister.File = src2_file;
-   inst.Src[1].SrcRegister.Index = src2_index;
+   inst.Src[0].Register.File = src1_file;
+   inst.Src[0].Register.Index = src1_index;
+   inst.Src[1].Register.File = src2_file;
+   inst.Src[1].Register.Index = src2_index;
 
    return inst;
 }
@@ -193,10 +193,10 @@ struct tgsi_full_instruction vl_tex
    inst.Instruction.NumSrcRegs = 2;
    inst.Instruction.Texture = 1;
    inst.Texture.Texture = tex;
-   inst.Src[0].SrcRegister.File = src1_file;
-   inst.Src[0].SrcRegister.Index = src1_index;
-   inst.Src[1].SrcRegister.File = src2_file;
-   inst.Src[1].SrcRegister.Index = src2_index;
+   inst.Src[0].Register.File = src1_file;
+   inst.Src[0].Register.Index = src1_index;
+   inst.Src[1].Register.File = src2_file;
+   inst.Src[1].Register.Index = src2_index;
 
    return inst;
 }
@@ -221,12 +221,12 @@ struct tgsi_full_instruction vl_inst4
    inst.Dst[0].Register.File = dst_file;
    inst.Dst[0].Register.Index = dst_index;
    inst.Instruction.NumSrcRegs = 3;
-   inst.Src[0].SrcRegister.File = src1_file;
-   inst.Src[0].SrcRegister.Index = src1_index;
-   inst.Src[1].SrcRegister.File = src2_file;
-   inst.Src[1].SrcRegister.Index = src2_index;
-   inst.Src[2].SrcRegister.File = src3_file;
-   inst.Src[2].SrcRegister.Index = src3_index;
+   inst.Src[0].Register.File = src1_file;
+   inst.Src[0].Register.Index = src1_index;
+   inst.Src[1].Register.File = src2_file;
+   inst.Src[1].Register.Index = src2_index;
+   inst.Src[2].Register.File = src3_file;
+   inst.Src[2].Register.Index = src3_index;
 
    return inst;
 }
index f639c6260526d974e260219e969ff741c554401b..4d43f65d29c4e841e1ed22bd4b6e6bdefa7e5b2f 100644 (file)
@@ -237,8 +237,8 @@ is_register_src(struct codegen *gen, int channel,
    if (swizzle > TGSI_SWIZZLE_W || sign_op != TGSI_UTIL_SIGN_KEEP) {
       return FALSE;
    }
-   if (src->SrcRegister.File == TGSI_FILE_TEMPORARY ||
-       src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
+   if (src->Register.File == TGSI_FILE_TEMPORARY ||
+       src->Register.File == TGSI_FILE_IMMEDIATE) {
       return TRUE;
    }
    return FALSE;
@@ -279,15 +279,15 @@ get_src_reg(struct codegen *gen,
    assert(swizzle <= TGSI_SWIZZLE_W);
 
    {
-      int index = src->SrcRegister.Index;
+      int index = src->Register.Index;
 
       assert(swizzle < 4);
 
-      if (src->SrcRegister.Indirect) {
+      if (src->Register.Indirect) {
          /* XXX unfinished */
       }
 
-      switch (src->SrcRegister.File) {
+      switch (src->Register.File) {
       case TGSI_FILE_TEMPORARY:
          reg = gen->temp_regs[index][swizzle];
          break;
@@ -1352,7 +1352,7 @@ static boolean
 emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
 {
    const uint target = inst->InstructionExtTexture.Texture;
-   const uint unit = inst->Src[1].SrcRegister.Index;
+   const uint unit = inst->Src[1].Register.Index;
    uint addr;
    int ch;
    int coord_regs[4], d_regs[4];
@@ -1373,7 +1373,7 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
       return FALSE;
    }
 
-   assert(inst->Src[1].SrcRegister.File == TGSI_FILE_SAMPLER);
+   assert(inst->Src[1].Register.File == TGSI_FILE_SAMPLER);
 
    spe_comment(gen->f, -4, "CALL tex:");
 
index 1b4792a316678a97c292d2f845a7f1933406c63c..5ed330aa6ec117abb8879b5fca9bb3b34f07715c 100644 (file)
@@ -431,22 +431,22 @@ fetch_source(
    index.i[0] =
    index.i[1] =
    index.i[2] =
-   index.i[3] = reg->SrcRegister.Index;
+   index.i[3] = reg->Register.Index;
 
-   if (reg->SrcRegister.Indirect) {
+   if (reg->Register.Indirect) {
       union spu_exec_channel index2;
       union spu_exec_channel indir_index;
 
       index2.i[0] =
       index2.i[1] =
       index2.i[2] =
-      index2.i[3] = reg->SrcRegisterInd.Index;
+      index2.i[3] = reg->Indirect.Index;
 
-      swizzle = tgsi_util_get_src_register_swizzle(&reg->SrcRegisterInd,
+      swizzle = tgsi_util_get_src_register_swizzle(&reg->Indirect,
                                                    CHAN_X);
       fetch_src_file_channel(
          mach,
-         reg->SrcRegisterInd.File,
+         reg->Indirect.File,
          swizzle,
          &index2,
          &indir_index );
@@ -454,8 +454,8 @@ fetch_source(
       index.q = si_a(index.q, indir_index.q);
    }
 
-   if( reg->SrcRegister.Dimension ) {
-      switch( reg->SrcRegister.File ) {
+   if( reg->Register.Dimension ) {
+      switch( reg->Register.File ) {
       case TGSI_FILE_INPUT:
          index.q = si_mpyi(index.q, 17);
          break;
@@ -466,24 +466,24 @@ fetch_source(
          ASSERT( 0 );
       }
 
-      index.i[0] += reg->SrcRegisterDim.Index;
-      index.i[1] += reg->SrcRegisterDim.Index;
-      index.i[2] += reg->SrcRegisterDim.Index;
-      index.i[3] += reg->SrcRegisterDim.Index;
+      index.i[0] += reg->Dimension.Index;
+      index.i[1] += reg->Dimension.Index;
+      index.i[2] += reg->Dimension.Index;
+      index.i[3] += reg->Dimension.Index;
 
-      if (reg->SrcRegisterDim.Indirect) {
+      if (reg->Dimension.Indirect) {
          union spu_exec_channel index2;
          union spu_exec_channel indir_index;
 
          index2.i[0] =
          index2.i[1] =
          index2.i[2] =
-         index2.i[3] = reg->SrcRegisterDimInd.Index;
+         index2.i[3] = reg->DimIndirect.Index;
 
-         swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterDimInd, CHAN_X );
+         swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
          fetch_src_file_channel(
             mach,
-            reg->SrcRegisterDimInd.File,
+            reg->DimIndirect.File,
             swizzle,
             &index2,
             &indir_index );
@@ -495,7 +495,7 @@ fetch_source(
    swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
    fetch_src_file_channel(
       mach,
-      reg->SrcRegister.File,
+      reg->Register.File,
       swizzle,
       &index,
       chan );
@@ -517,7 +517,7 @@ fetch_source(
       break;
    }
 
-   if (reg->SrcRegisterExtMod.Complement) {
+   if (reg->RegisterExtMod.Complement) {
       chan->q = si_fs(mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].q, chan->q);
    }
 }
@@ -677,7 +677,7 @@ exec_tex(struct spu_exec_machine *mach,
          const struct tgsi_full_instruction *inst,
          boolean biasLod, boolean projected)
 {
-   const uint unit = inst->Src[1].SrcRegister.Index;
+   const uint unit = inst->Src[1].Register.Index;
    union spu_exec_channel r[8];
    uint chan_index;
    float lodBias;
index c2c32b22d5a9dec51f133492e3952f95cc1bb8fb..24057e29e36317dcb42ee1a56beaf10cd082fee4 100644 (file)
@@ -33,7 +33,7 @@ tgsi_util_get_full_src_register_swizzle(
    unsigned component )
 {
    return tgsi_util_get_src_register_swizzle(
-      reg->SrcRegister,
+      reg->Register,
       component );
 }
 
@@ -45,10 +45,10 @@ tgsi_util_get_full_src_register_sign_mode(
 {
    unsigned sign_mode;
 
-   if( reg->SrcRegisterExtMod.Absolute ) {
+   if( reg->RegisterExtMod.Absolute ) {
       /* Consider only the post-abs negation. */
 
-      if( reg->SrcRegisterExtMod.Negate ) {
+      if( reg->RegisterExtMod.Negate ) {
          sign_mode = TGSI_UTIL_SIGN_SET;
       }
       else {
@@ -60,8 +60,8 @@ tgsi_util_get_full_src_register_sign_mode(
 
       unsigned negate;
 
-      negate = reg->SrcRegister.Negate;
-      if( reg->SrcRegisterExtMod.Negate ) {
+      negate = reg->Register.Negate;
+      if( reg->RegisterExtMod.Negate ) {
          negate = !negate;
       }
 
index 13c280827af4f842240009c461592941fcd0fa84..25c53210be8eb2552440c4e1c74575459b2e2c62 100644 (file)
@@ -143,12 +143,12 @@ static uint
 src_vector(struct i915_fp_compile *p,
            const struct tgsi_full_src_register *source)
 {
-   uint index = source->SrcRegister.Index;
+   uint index = source->Register.Index;
    uint src = 0, sem_name, sem_ind;
 
-   switch (source->SrcRegister.File) {
+   switch (source->Register.File) {
    case TGSI_FILE_TEMPORARY:
-      if (source->SrcRegister.Index >= I915_MAX_TEMPORARY) {
+      if (source->Register.Index >= I915_MAX_TEMPORARY) {
          i915_program_error(p, "Exceeded max temporary reg");
          return 0;
       }
@@ -215,17 +215,17 @@ src_vector(struct i915_fp_compile *p,
    }
 
    src = swizzle(src,
-                source->SrcRegister.SwizzleX,
-                source->SrcRegister.SwizzleY,
-                source->SrcRegister.SwizzleZ,
-                source->SrcRegister.SwizzleW);
+                source->Register.SwizzleX,
+                source->Register.SwizzleY,
+                source->Register.SwizzleZ,
+                source->Register.SwizzleW);
 
 
    /* There's both negate-all-components and per-component negation.
     * Try to handle both here.
     */
    {
-      int n = source->SrcRegister.Negate;
+      int n = source->Register.Negate;
       src = negate(src, n, n, n, n);
    }
 
@@ -233,7 +233,7 @@ src_vector(struct i915_fp_compile *p,
 #if 0
    /* XXX assertions disabled to allow arbfplight.c to run */
    /* XXX enable these assertions, or fix things */
-   assert(!source->SrcRegister.Absolute);
+   assert(!source->Register.Absolute);
 #endif
    return src;
 }
@@ -339,7 +339,7 @@ emit_tex(struct i915_fp_compile *p,
          uint opcode)
 {
    uint texture = inst->Texture.Texture;
-   uint unit = inst->Src[1].SrcRegister.Index;
+   uint unit = inst->Src[1].Register.Index;
    uint tex = translate_tex_src_target( p, texture );
    uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
    uint coord = src_vector( p, &inst->Src[0]);
index 99266f34ed7cced6dfcbdc9c856e340a2a20366b..fe2db04d8fa4c84612a915b452bf79c6e77f8578 100644 (file)
@@ -167,9 +167,9 @@ emit_fetch(
    case TGSI_SWIZZLE_Z:
    case TGSI_SWIZZLE_W:
 
-      switch (reg->SrcRegister.File) {
+      switch (reg->Register.File) {
       case TGSI_FILE_CONSTANT: {
-         LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), reg->SrcRegister.Index*4 + swizzle, 0);
+         LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), reg->Register.Index*4 + swizzle, 0);
          LLVMValueRef scalar_ptr = LLVMBuildGEP(bld->base.builder, bld->consts_ptr, &index, 1, "");
          LLVMValueRef scalar = LLVMBuildLoad(bld->base.builder, scalar_ptr, "");
          res = lp_build_broadcast_scalar(&bld->base, scalar);
@@ -177,17 +177,17 @@ emit_fetch(
       }
 
       case TGSI_FILE_IMMEDIATE:
-         res = bld->immediates[reg->SrcRegister.Index][swizzle];
+         res = bld->immediates[reg->Register.Index][swizzle];
          assert(res);
          break;
 
       case TGSI_FILE_INPUT:
-         res = bld->inputs[reg->SrcRegister.Index][swizzle];
+         res = bld->inputs[reg->Register.Index][swizzle];
          assert(res);
          break;
 
       case TGSI_FILE_TEMPORARY:
-         res = bld->temps[reg->SrcRegister.Index][swizzle];
+         res = bld->temps[reg->Register.Index][swizzle];
          if(!res)
             return bld->base.undef;
          break;
@@ -319,7 +319,7 @@ emit_tex( struct lp_build_tgsi_soa_context *bld,
           boolean projected,
           LLVMValueRef *texel)
 {
-   const uint unit = inst->Src[1].SrcRegister.Index;
+   const uint unit = inst->Src[1].Register.Index;
    LLVMValueRef lodbias;
    LLVMValueRef oow;
    LLVMValueRef coords[3];
@@ -424,8 +424,8 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
    uint i;
    for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
       const struct tgsi_full_src_register *reg = &inst->Src[i];
-      if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
-          reg->SrcRegister.Indirect)
+      if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+          reg->Register.Indirect)
          return TRUE;
    }
    for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
index e3bb9f9d7f962a067354e74a3e15196c40d237e8..9e8aab9754a19e55ddf16cfcf74adf7e21377f50 100644 (file)
@@ -253,32 +253,32 @@ static INLINE struct nv20_sreg
 tgsi_src(struct nv20_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
        struct nv20_sreg src;
 
-       switch (fsrc->SrcRegister.File) {
+       switch (fsrc->Register.File) {
        case TGSI_FILE_INPUT:
-               src = nv20_sr(NV30SR_INPUT, fsrc->SrcRegister.Index);
+               src = nv20_sr(NV30SR_INPUT, fsrc->Register.Index);
                break;
        case TGSI_FILE_CONSTANT:
-               src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+               src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
                break;
        case TGSI_FILE_IMMEDIATE:
-               src = vpc->imm[fsrc->SrcRegister.Index];
+               src = vpc->imm[fsrc->Register.Index];
                break;
        case TGSI_FILE_TEMPORARY:
-               if (vpc->high_temp < fsrc->SrcRegister.Index)
-                       vpc->high_temp = fsrc->SrcRegister.Index;
-               src = nv20_sr(NV30SR_TEMP, fsrc->SrcRegister.Index);
+               if (vpc->high_temp < fsrc->Register.Index)
+                       vpc->high_temp = fsrc->Register.Index;
+               src = nv20_sr(NV30SR_TEMP, fsrc->Register.Index);
                break;
        default:
                NOUVEAU_ERR("bad src file\n");
                break;
        }
 
-       src.abs = fsrc->SrcRegister.Absolute;
-       src.negate = fsrc->SrcRegister.Negate;
-       src.swz[0] = fsrc->SrcRegister.SwizzleX;
-       src.swz[1] = fsrc->SrcRegister.SwizzleY;
-       src.swz[2] = fsrc->SrcRegister.SwizzleZ;
-       src.swz[3] = fsrc->SrcRegister.SwizzleW;
+       src.abs = fsrc->Register.Absolute;
+       src.negate = fsrc->Register.Negate;
+       src.swz[0] = fsrc->Register.SwizzleX;
+       src.swz[1] = fsrc->Register.SwizzleY;
+       src.swz[2] = fsrc->Register.SwizzleZ;
+       src.swz[3] = fsrc->Register.SwizzleW;
        return src;
 }
 
@@ -335,7 +335,7 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+               if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
                        src[i] = tgsi_src(vpc, fsrc);
                }
        }
@@ -344,10 +344,10 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
-                       if (ai == -1 || ai == fsrc->SrcRegister.Index) {
-                               ai = fsrc->SrcRegister.Index;
+                       if (ai == -1 || ai == fsrc->Register.Index) {
+                               ai = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
@@ -360,8 +360,8 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
                 */
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_IMMEDIATE:
-                       if (ci == -1 || ci == fsrc->SrcRegister.Index) {
-                               ci = fsrc->SrcRegister.Index;
+                       if (ci == -1 || ci == fsrc->Register.Index) {
+                               ci = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
index 14dc884b3acfbe53746b63146c518385d0dd5f95..40965a97723b5c2cfe2927ab60c4d3c7b3b0d079 100644 (file)
@@ -237,20 +237,20 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
 {
        struct nv30_sreg src;
 
-       switch (fsrc->SrcRegister.File) {
+       switch (fsrc->Register.File) {
        case TGSI_FILE_INPUT:
                src = nv30_sr(NV30SR_INPUT,
-                             fpc->attrib_map[fsrc->SrcRegister.Index]);
+                             fpc->attrib_map[fsrc->Register.Index]);
                break;
        case TGSI_FILE_CONSTANT:
-               src = constant(fpc, fsrc->SrcRegister.Index, NULL);
+               src = constant(fpc, fsrc->Register.Index, NULL);
                break;
        case TGSI_FILE_IMMEDIATE:
-               assert(fsrc->SrcRegister.Index < fpc->nr_imm);
-               src = fpc->imm[fsrc->SrcRegister.Index];
+               assert(fsrc->Register.Index < fpc->nr_imm);
+               src = fpc->imm[fsrc->Register.Index];
                break;
        case TGSI_FILE_TEMPORARY:
-               src = nv30_sr(NV30SR_TEMP, fsrc->SrcRegister.Index + 1);
+               src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index + 1);
                if (fpc->high_temp < src.index)
                        fpc->high_temp = src.index;
                break;
@@ -258,7 +258,7 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
         * Luckily fragprog results are just temp regs..
         */
        case TGSI_FILE_OUTPUT:
-               if (fsrc->SrcRegister.Index == fpc->colour_id)
+               if (fsrc->Register.Index == fpc->colour_id)
                        return nv30_sr(NV30SR_OUTPUT, 0);
                else
                        return nv30_sr(NV30SR_OUTPUT, 1);
@@ -268,12 +268,12 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
                break;
        }
 
-       src.abs = fsrc->SrcRegister.Absolute;
-       src.negate = fsrc->SrcRegister.Negate;
-       src.swz[0] = fsrc->SrcRegister.SwizzleX;
-       src.swz[1] = fsrc->SrcRegister.SwizzleY;
-       src.swz[2] = fsrc->SrcRegister.SwizzleZ;
-       src.swz[3] = fsrc->SrcRegister.SwizzleW;
+       src.abs = fsrc->Register.Absolute;
+       src.negate = fsrc->Register.Negate;
+       src.swz[0] = fsrc->Register.SwizzleX;
+       src.swz[1] = fsrc->Register.SwizzleY;
+       src.swz[2] = fsrc->Register.SwizzleZ;
+       src.swz[3] = fsrc->Register.SwizzleW;
        return src;
 }
 
@@ -364,7 +364,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+               if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
                        src[i] = tgsi_src(fpc, fsrc);
                }
        }
@@ -374,7 +374,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
 
                fsrc = &finst->Src[i];
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_TEMPORARY:
@@ -385,14 +385,14 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
                        break;
                }
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
-                       if (ai == -1 || ai == fsrc->SrcRegister.Index) {
-                               ai = fsrc->SrcRegister.Index;
+                       if (ai == -1 || ai == fsrc->Register.Index) {
+                               ai = fsrc->Register.Index;
                                src[i] = tgsi_src(fpc, fsrc);
                        } else {
                                NOUVEAU_MSG("extra src attr %d\n",
-                                        fsrc->SrcRegister.Index);
+                                        fsrc->Register.Index);
                                src[i] = temp(fpc);
                                arith(fpc, 0, MOV, src[i], MASK_ALL,
                                      tgsi_src(fpc, fsrc), none, none);
@@ -400,8 +400,8 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
                        break;
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_IMMEDIATE:
-                       if (ci == -1 || ci == fsrc->SrcRegister.Index) {
-                               ci = fsrc->SrcRegister.Index;
+                       if (ci == -1 || ci == fsrc->Register.Index) {
+                               ci = fsrc->Register.Index;
                                src[i] = tgsi_src(fpc, fsrc);
                        } else {
                                src[i] = temp(fpc);
@@ -413,7 +413,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
                        /* handled above */
                        break;
                case TGSI_FILE_SAMPLER:
-                       unit = fsrc->SrcRegister.Index;
+                       unit = fsrc->Register.Index;
                        break;
                case TGSI_FILE_OUTPUT:
                        break;
index 41e4161dda18792ff3330d12b3bc5fc4acb5715b..36ac8299f0c5f576dd20a6d181554757e6828700 100644 (file)
@@ -253,32 +253,32 @@ static INLINE struct nv30_sreg
 tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
        struct nv30_sreg src;
 
-       switch (fsrc->SrcRegister.File) {
+       switch (fsrc->Register.File) {
        case TGSI_FILE_INPUT:
-               src = nv30_sr(NV30SR_INPUT, fsrc->SrcRegister.Index);
+               src = nv30_sr(NV30SR_INPUT, fsrc->Register.Index);
                break;
        case TGSI_FILE_CONSTANT:
-               src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+               src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
                break;
        case TGSI_FILE_IMMEDIATE:
-               src = vpc->imm[fsrc->SrcRegister.Index];
+               src = vpc->imm[fsrc->Register.Index];
                break;
        case TGSI_FILE_TEMPORARY:
-               if (vpc->high_temp < fsrc->SrcRegister.Index)
-                       vpc->high_temp = fsrc->SrcRegister.Index;
-               src = nv30_sr(NV30SR_TEMP, fsrc->SrcRegister.Index);
+               if (vpc->high_temp < fsrc->Register.Index)
+                       vpc->high_temp = fsrc->Register.Index;
+               src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index);
                break;
        default:
                NOUVEAU_ERR("bad src file\n");
                break;
        }
 
-       src.abs = fsrc->SrcRegister.Absolute;
-       src.negate = fsrc->SrcRegister.Negate;
-       src.swz[0] = fsrc->SrcRegister.SwizzleX;
-       src.swz[1] = fsrc->SrcRegister.SwizzleY;
-       src.swz[2] = fsrc->SrcRegister.SwizzleZ;
-       src.swz[3] = fsrc->SrcRegister.SwizzleW;
+       src.abs = fsrc->Register.Absolute;
+       src.negate = fsrc->Register.Negate;
+       src.swz[0] = fsrc->Register.SwizzleX;
+       src.swz[1] = fsrc->Register.SwizzleY;
+       src.swz[2] = fsrc->Register.SwizzleZ;
+       src.swz[3] = fsrc->Register.SwizzleW;
        return src;
 }
 
@@ -335,7 +335,7 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+               if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
                        src[i] = tgsi_src(vpc, fsrc);
                }
        }
@@ -344,10 +344,10 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
-                       if (ai == -1 || ai == fsrc->SrcRegister.Index) {
-                               ai = fsrc->SrcRegister.Index;
+                       if (ai == -1 || ai == fsrc->Register.Index) {
+                               ai = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
@@ -360,8 +360,8 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
                 */
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_IMMEDIATE:
-                       if (ci == -1 || ci == fsrc->SrcRegister.Index) {
-                               ci = fsrc->SrcRegister.Index;
+                       if (ci == -1 || ci == fsrc->Register.Index) {
+                               ci = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
index 02c23e92c04c29e491654c39c41bfc77201d9f6f..1bf16726d105e1314a20b84290a94bf58e8d9aab 100644 (file)
@@ -255,36 +255,36 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
 {
        struct nv40_sreg src;
 
-       switch (fsrc->SrcRegister.File) {
+       switch (fsrc->Register.File) {
        case TGSI_FILE_INPUT:
                src = nv40_sr(NV40SR_INPUT,
-                             fpc->attrib_map[fsrc->SrcRegister.Index]);
+                             fpc->attrib_map[fsrc->Register.Index]);
                break;
        case TGSI_FILE_CONSTANT:
-               src = constant(fpc, fsrc->SrcRegister.Index, NULL);
+               src = constant(fpc, fsrc->Register.Index, NULL);
                break;
        case TGSI_FILE_IMMEDIATE:
-               assert(fsrc->SrcRegister.Index < fpc->nr_imm);
-               src = fpc->imm[fsrc->SrcRegister.Index];
+               assert(fsrc->Register.Index < fpc->nr_imm);
+               src = fpc->imm[fsrc->Register.Index];
                break;
        case TGSI_FILE_TEMPORARY:
-               src = fpc->r_temp[fsrc->SrcRegister.Index];
+               src = fpc->r_temp[fsrc->Register.Index];
                break;
        /* NV40 fragprog result regs are just temps, so this is simple */
        case TGSI_FILE_OUTPUT:
-               src = fpc->r_result[fsrc->SrcRegister.Index];
+               src = fpc->r_result[fsrc->Register.Index];
                break;
        default:
                NOUVEAU_ERR("bad src file\n");
                break;
        }
 
-       src.abs = fsrc->SrcRegister.Absolute;
-       src.negate = fsrc->SrcRegister.Negate;
-       src.swz[0] = fsrc->SrcRegister.SwizzleX;
-       src.swz[1] = fsrc->SrcRegister.SwizzleY;
-       src.swz[2] = fsrc->SrcRegister.SwizzleZ;
-       src.swz[3] = fsrc->SrcRegister.SwizzleW;
+       src.abs = fsrc->Register.Absolute;
+       src.negate = fsrc->Register.Negate;
+       src.swz[0] = fsrc->Register.SwizzleX;
+       src.swz[1] = fsrc->Register.SwizzleY;
+       src.swz[2] = fsrc->Register.SwizzleZ;
+       src.swz[3] = fsrc->Register.SwizzleW;
        return src;
 }
 
@@ -365,7 +365,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+               if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
                        src[i] = tgsi_src(fpc, fsrc);
                }
        }
@@ -375,7 +375,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
 
                fsrc = &finst->Src[i];
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_TEMPORARY:
@@ -386,10 +386,10 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
                        break;
                }
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
-                       if (ai == -1 || ai == fsrc->SrcRegister.Index) {
-                               ai = fsrc->SrcRegister.Index;
+                       if (ai == -1 || ai == fsrc->Register.Index) {
+                               ai = fsrc->Register.Index;
                                src[i] = tgsi_src(fpc, fsrc);
                        } else {
                                src[i] = temp(fpc);
@@ -399,8 +399,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
                        break;
                case TGSI_FILE_CONSTANT:
                        if ((ci == -1 && ii == -1) ||
-                           ci == fsrc->SrcRegister.Index) {
-                               ci = fsrc->SrcRegister.Index;
+                           ci == fsrc->Register.Index) {
+                               ci = fsrc->Register.Index;
                                src[i] = tgsi_src(fpc, fsrc);
                        } else {
                                src[i] = temp(fpc);
@@ -410,8 +410,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
                        break;
                case TGSI_FILE_IMMEDIATE:
                        if ((ci == -1 && ii == -1) ||
-                           ii == fsrc->SrcRegister.Index) {
-                               ii = fsrc->SrcRegister.Index;
+                           ii == fsrc->Register.Index) {
+                               ii = fsrc->Register.Index;
                                src[i] = tgsi_src(fpc, fsrc);
                        } else {
                                src[i] = temp(fpc);
@@ -423,7 +423,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
                        /* handled above */
                        break;
                case TGSI_FILE_SAMPLER:
-                       unit = fsrc->SrcRegister.Index;
+                       unit = fsrc->Register.Index;
                        break;
                case TGSI_FILE_OUTPUT:
                        break;
index c4f51d622c2bc0947e7b953fb41052b0ae6962d1..55835ee644c3bdfd55503f39c57411f0e2afebe5 100644 (file)
@@ -295,30 +295,30 @@ static INLINE struct nv40_sreg
 tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
        struct nv40_sreg src;
 
-       switch (fsrc->SrcRegister.File) {
+       switch (fsrc->Register.File) {
        case TGSI_FILE_INPUT:
-               src = nv40_sr(NV40SR_INPUT, fsrc->SrcRegister.Index);
+               src = nv40_sr(NV40SR_INPUT, fsrc->Register.Index);
                break;
        case TGSI_FILE_CONSTANT:
-               src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+               src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
                break;
        case TGSI_FILE_IMMEDIATE:
-               src = vpc->imm[fsrc->SrcRegister.Index];
+               src = vpc->imm[fsrc->Register.Index];
                break;
        case TGSI_FILE_TEMPORARY:
-               src = vpc->r_temp[fsrc->SrcRegister.Index];
+               src = vpc->r_temp[fsrc->Register.Index];
                break;
        default:
                NOUVEAU_ERR("bad src file\n");
                break;
        }
 
-       src.abs = fsrc->SrcRegister.Absolute;
-       src.negate = fsrc->SrcRegister.Negate;
-       src.swz[0] = fsrc->SrcRegister.SwizzleX;
-       src.swz[1] = fsrc->SrcRegister.SwizzleY;
-       src.swz[2] = fsrc->SrcRegister.SwizzleZ;
-       src.swz[3] = fsrc->SrcRegister.SwizzleW;
+       src.abs = fsrc->Register.Absolute;
+       src.negate = fsrc->Register.Negate;
+       src.swz[0] = fsrc->Register.SwizzleX;
+       src.swz[1] = fsrc->Register.SwizzleY;
+       src.swz[2] = fsrc->Register.SwizzleZ;
+       src.swz[3] = fsrc->Register.SwizzleW;
        return src;
 }
 
@@ -406,7 +406,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
                const struct tgsi_full_src_register *fsrc;
 
                fsrc = &finst->Src[i];
-               if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+               if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
                        src[i] = tgsi_src(vpc, fsrc);
                }
        }
@@ -416,7 +416,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
 
                fsrc = &finst->Src[i];
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
                case TGSI_FILE_CONSTANT:
                case TGSI_FILE_TEMPORARY:
@@ -427,10 +427,10 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
                        break;
                }
 
-               switch (fsrc->SrcRegister.File) {
+               switch (fsrc->Register.File) {
                case TGSI_FILE_INPUT:
-                       if (ai == -1 || ai == fsrc->SrcRegister.Index) {
-                               ai = fsrc->SrcRegister.Index;
+                       if (ai == -1 || ai == fsrc->Register.Index) {
+                               ai = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
@@ -440,8 +440,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
                        break;
                case TGSI_FILE_CONSTANT:
                        if ((ci == -1 && ii == -1) ||
-                           ci == fsrc->SrcRegister.Index) {
-                               ci = fsrc->SrcRegister.Index;
+                           ci == fsrc->Register.Index) {
+                               ci = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
@@ -451,8 +451,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
                        break;
                case TGSI_FILE_IMMEDIATE:
                        if ((ci == -1 && ii == -1) ||
-                           ii == fsrc->SrcRegister.Index) {
-                               ii = fsrc->SrcRegister.Index;
+                           ii == fsrc->Register.Index) {
+                               ii = fsrc->Register.Index;
                                src[i] = tgsi_src(vpc, fsrc);
                        } else {
                                src[i] = temp(vpc);
index 3409edb4c83b6307233cad3f9a8b417c8e90919a..1509cecaac46c22dbc89fad7fd24d615ebd5098e 100644 (file)
@@ -1535,10 +1535,10 @@ negate_supported(const struct tgsi_full_instruction *insn, int i)
        for (s = 0; s < insn->Instruction.NumSrcRegs; ++s) {
                if (s == i)
                        continue;
-               if ((insn->Src[s].SrcRegister.Index ==
-                    insn->Src[i].SrcRegister.Index) &&
-                   (insn->Src[s].SrcRegister.File ==
-                    insn->Src[i].SrcRegister.File))
+               if ((insn->Src[s].Register.Index ==
+                    insn->Src[i].Register.Index) &&
+                   (insn->Src[s].Register.File ==
+                    insn->Src[i].Register.File))
                        return FALSE;
        }
 
@@ -1644,8 +1644,8 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
        struct nv50_reg *temp;
        unsigned sgn, c, swz;
 
-       if (src->SrcRegister.File != TGSI_FILE_CONSTANT)
-               assert(!src->SrcRegister.Indirect);
+       if (src->Register.File != TGSI_FILE_CONSTANT)
+               assert(!src->Register.Indirect);
 
        sgn = tgsi_util_get_full_src_register_sign_mode(src, chan);
 
@@ -1655,16 +1655,16 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
        case TGSI_SWIZZLE_Y:
        case TGSI_SWIZZLE_Z:
        case TGSI_SWIZZLE_W:
-               switch (src->SrcRegister.File) {
+               switch (src->Register.File) {
                case TGSI_FILE_INPUT:
-                       r = &pc->attr[src->SrcRegister.Index * 4 + c];
+                       r = &pc->attr[src->Register.Index * 4 + c];
                        break;
                case TGSI_FILE_TEMPORARY:
-                       r = &pc->temp[src->SrcRegister.Index * 4 + c];
+                       r = &pc->temp[src->Register.Index * 4 + c];
                        break;
                case TGSI_FILE_CONSTANT:
-                       if (!src->SrcRegister.Indirect) {
-                               r = &pc->param[src->SrcRegister.Index * 4 + c];
+                       if (!src->Register.Indirect) {
+                               r = &pc->param[src->Register.Index * 4 + c];
                                break;
                        }
                        /* Indicate indirection by setting r->acc < 0 and
@@ -1672,19 +1672,19 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
                         */
                        r = MALLOC_STRUCT(nv50_reg);
                        swz = tgsi_util_get_src_register_swizzle(
-                                                &src->SrcRegisterInd, 0);
+                                                &src->Indirect, 0);
                        ctor_reg(r, P_CONST,
-                                src->SrcRegisterInd.Index * 4 + swz,
-                                src->SrcRegister.Index * 4 + c);
+                                src->Indirect.Index * 4 + swz,
+                                src->Register.Index * 4 + c);
                        r->acc = -1;
                        break;
                case TGSI_FILE_IMMEDIATE:
-                       r = &pc->immd[src->SrcRegister.Index * 4 + c];
+                       r = &pc->immd[src->Register.Index * 4 + c];
                        break;
                case TGSI_FILE_SAMPLER:
                        break;
                case TGSI_FILE_ADDRESS:
-                       r = pc->addr[src->SrcRegister.Index * 4 + c];
+                       r = pc->addr[src->Register.Index * 4 + c];
                        assert(r);
                        break;
                default:
@@ -1871,8 +1871,8 @@ nv50_program_tx_insn(struct nv50_pc *pc,
                src_mask = nv50_tgsi_src_mask(inst, i);
                neg_supp = negate_supported(inst, i);
 
-               if (fs->SrcRegister.File == TGSI_FILE_SAMPLER)
-                       unit = fs->SrcRegister.Index;
+               if (fs->Register.File == TGSI_FILE_SAMPLER)
+                       unit = fs->Register.Index;
 
                for (c = 0; c < 4; c++)
                        if (src_mask & (1 << c))
@@ -2284,10 +2284,10 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
        for (i = 0; i < insn->Instruction.NumSrcRegs; i++) {
                src = &insn->Src[i];
 
-               if (src->SrcRegister.File == TGSI_FILE_TEMPORARY)
+               if (src->Register.File == TGSI_FILE_TEMPORARY)
                        reg = pc->temp;
                else
-               if (src->SrcRegister.File == TGSI_FILE_INPUT)
+               if (src->Register.File == TGSI_FILE_INPUT)
                        reg = pc->attr;
                else
                        continue;
@@ -2299,7 +2299,7 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
                                continue;
                        k = tgsi_util_get_full_src_register_swizzle(src, c);
 
-                       reg[src->SrcRegister.Index * 4 + k].acc = pc->insn_nr;
+                       reg[src->Register.Index * 4 + k].acc = pc->insn_nr;
                }
        }
 }
@@ -2391,8 +2391,8 @@ nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
                boolean neg_supp = negate_supported(insn, i);
 
                fs = &insn->Src[i];
-               if (fs->SrcRegister.File != fd->Register.File ||
-                   fs->SrcRegister.Index != fd->Register.Index)
+               if (fs->Register.File != fd->Register.File ||
+                   fs->Register.Index != fd->Register.Index)
                        continue;
 
                for (chn = 0; chn < 4; ++chn) {
index 92796d150bf87a759babb8e35160f36f4aff374a..9fb2de24032730c4c8800efa8a27b511fbcce1cb 100644 (file)
@@ -201,15 +201,15 @@ static void transform_srcreg(
     struct rc_src_register * dst,
     struct tgsi_full_src_register * src)
 {
-    dst->File = translate_register_file(src->SrcRegister.File);
-    dst->Index = translate_register_index(ttr, src->SrcRegister.File, src->SrcRegister.Index);
-    dst->RelAddr = src->SrcRegister.Indirect;
+    dst->File = translate_register_file(src->Register.File);
+    dst->Index = translate_register_index(ttr, src->Register.File, src->Register.Index);
+    dst->RelAddr = src->Register.Indirect;
     dst->Swizzle = tgsi_util_get_full_src_register_swizzle(src, 0);
     dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 1) << 3;
     dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 2) << 6;
     dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 3) << 9;
-    dst->Abs = src->SrcRegister.Absolute;
-    dst->Negate = src->SrcRegister.Negate ? RC_MASK_XYZW : 0;
+    dst->Abs = src->Register.Absolute;
+    dst->Negate = src->Register.Negate ? RC_MASK_XYZW : 0;
 }
 
 static void transform_texture(struct rc_instruction * dst, struct tgsi_instruction_texture src)
@@ -261,8 +261,8 @@ static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_inst
         transform_dstreg(ttr, &dst->U.I.DstReg, &src->Dst[0]);
 
     for(i = 0; i < src->Instruction.NumSrcRegs; ++i) {
-        if (src->Src[i].SrcRegister.File == TGSI_FILE_SAMPLER)
-            dst->U.I.TexSrcUnit = src->Src[i].SrcRegister.Index;
+        if (src->Src[i].Register.File == TGSI_FILE_SAMPLER)
+            dst->U.I.TexSrcUnit = src->Src[i].Register.Index;
         else
             transform_srcreg(ttr, &dst->U.I.SrcReg[i], &src->Src[i]);
     }
index 9ca89f1cddc4437df2c298a6f0d39c0ee076b0b8..1670da8bfa995436a48c0b0a66c353dcf60fbdea 100644 (file)
@@ -176,33 +176,33 @@ translate_src_register( const struct svga_shader_emitter *emit,
 {
    struct src_register src;
 
-   switch (reg->SrcRegister.File) {
+   switch (reg->Register.File) {
    case TGSI_FILE_INPUT:
       /* Input registers are referred to by their semantic name rather
        * than by index.  Use the mapping build up from the decls:
        */
-      src = emit->input_map[reg->SrcRegister.Index];
+      src = emit->input_map[reg->Register.Index];
       break;
        
    case TGSI_FILE_IMMEDIATE:
       /* Immediates are appended after TGSI constants in the D3D
        * constant buffer.
        */
-      src = src_register( translate_file( reg->SrcRegister.File ),
-                          reg->SrcRegister.Index + 
+      src = src_register( translate_file( reg->Register.File ),
+                          reg->Register.Index + 
                           emit->imm_start );
       break;
 
    default:
-      src = src_register( translate_file( reg->SrcRegister.File ),
-                          reg->SrcRegister.Index );
+      src = src_register( translate_file( reg->Register.File ),
+                          reg->Register.Index );
 
       break;
    }
 
    /* Indirect addressing (for coninstant buffer lookups only)
     */
-   if (reg->SrcRegister.Indirect)
+   if (reg->Register.Indirect)
    {
       /* we shift the offset towards the minimum */
       if (svga_arl_needs_adjustment( emit )) {
@@ -213,28 +213,28 @@ translate_src_register( const struct svga_shader_emitter *emit,
       /* Not really sure what should go in the second token:
        */
       src.indirect = src_token( SVGA3DREG_ADDR,
-                                reg->SrcRegisterInd.Index );
+                                reg->Indirect.Index );
 
       src.indirect.swizzle = SWIZZLE_XXXX;
    }
 
    src = swizzle( src,
-                  reg->SrcRegister.SwizzleX,
-                  reg->SrcRegister.SwizzleY,
-                  reg->SrcRegister.SwizzleZ,
-                  reg->SrcRegister.SwizzleW );
+                  reg->Register.SwizzleX,
+                  reg->Register.SwizzleY,
+                  reg->Register.SwizzleZ,
+                  reg->Register.SwizzleW );
 
    /* src.mod isn't a bitfield, unfortunately:
     * See tgsi_util_get_full_src_register_sign_mode for implementation details.
     */
-   if (reg->SrcRegister.Absolute) {
-      if (reg->SrcRegister.Negate)
+   if (reg->Register.Absolute) {
+      if (reg->Register.Negate)
          src.base.srcMod = SVGA3DSRCMOD_ABSNEG;
       else
          src.base.srcMod = SVGA3DSRCMOD_ABS;
    }
    else {
-      if (reg->SrcRegister.Negate)
+      if (reg->Register.Negate)
          src.base.srcMod = SVGA3DSRCMOD_NEG;
       else
          src.base.srcMod = SVGA3DSRCMOD_NONE;
@@ -986,13 +986,13 @@ static boolean emit_kil(struct svga_shader_emitter *emit,
    inst = inst_token( SVGA3DOP_TEXKILL );
    src0 = translate_src_register( emit, reg );
 
-   if (reg->SrcRegister.Absolute ||
-       reg->SrcRegister.Negate ||
-       reg->SrcRegister.Indirect ||
-       reg->SrcRegister.SwizzleX != 0 ||
-       reg->SrcRegister.SwizzleY != 1 ||
-       reg->SrcRegister.SwizzleZ != 2 ||
-       reg->SrcRegister.File != TGSI_FILE_TEMPORARY)
+   if (reg->Register.Absolute ||
+       reg->Register.Negate ||
+       reg->Register.Indirect ||
+       reg->Register.SwizzleX != 0 ||
+       reg->Register.SwizzleY != 1 ||
+       reg->Register.SwizzleZ != 2 ||
+       reg->Register.File != TGSI_FILE_TEMPORARY)
    {
       SVGA3dShaderDestToken temp = get_temp( emit );
 
@@ -2543,27 +2543,27 @@ pre_parse_instruction( struct svga_shader_emitter *emit,
                        const struct tgsi_full_instruction *insn,
                        int current_arl)
 {
-   if (insn->Src[0].SrcRegister.Indirect &&
-       insn->Src[0].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+   if (insn->Src[0].Register.Indirect &&
+       insn->Src[0].Indirect.File == TGSI_FILE_ADDRESS) {
       const struct tgsi_full_src_register *reg = &insn->Src[0];
-      if (reg->SrcRegister.Index < 0) {
-         pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+      if (reg->Register.Index < 0) {
+         pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
       }
    }
 
-   if (insn->Src[1].SrcRegister.Indirect &&
-       insn->Src[1].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+   if (insn->Src[1].Register.Indirect &&
+       insn->Src[1].Indirect.File == TGSI_FILE_ADDRESS) {
       const struct tgsi_full_src_register *reg = &insn->Src[1];
-      if (reg->SrcRegister.Index < 0) {
-         pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+      if (reg->Register.Index < 0) {
+         pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
       }
    }
 
-   if (insn->Src[2].SrcRegister.Indirect &&
-       insn->Src[2].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+   if (insn->Src[2].Register.Indirect &&
+       insn->Src[2].Indirect.File == TGSI_FILE_ADDRESS) {
       const struct tgsi_full_src_register *reg = &insn->Src[2];
-      if (reg->SrcRegister.Index < 0) {
-         pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+      if (reg->Register.Index < 0) {
+         pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
       }
    }