ruby: Python config files now sets a unique id for each sequencer
authorBrad Beckmann <Brad.Beckmann@amd.com>
Mon, 22 Mar 2010 04:22:20 +0000 (21:22 -0700)
committerBrad Beckmann <Brad.Beckmann@amd.com>
Mon, 22 Mar 2010 04:22:20 +0000 (21:22 -0700)
configs/ruby/MESI_CMP_directory.py
configs/ruby/MI_example.py
configs/ruby/MOESI_CMP_directory.py
configs/ruby/MOESI_CMP_token.py
configs/ruby/MOESI_hammer.py

index 8ae2be2fa413fdd1fbc705fe031b9a1cdf21a7ee..ca5a7aa4626d51fc1e9ae645f72e81d5cf3fbf30 100644 (file)
@@ -76,7 +76,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
         l1d_cache = L1Cache(size = options.l1d_size,
                             assoc = options.l1d_assoc)
 
-        cpu_seq = RubySequencer(icache = l1i_cache,
+        cpu_seq = RubySequencer(version = i,
+                                icache = l1i_cache,
                                 dcache = l1d_cache,
                                 physMemPort = phys_mem.port,
                                 physmem = phys_mem)
index 971a52dc8ee8b325fa19d06b77c410879da89f72..96515971e3127c1a606e7ca97096f70211a9daf2 100644 (file)
@@ -71,7 +71,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
         #
         # Only one unified L1 cache exists.  Can cache instructions and data.
         #
-        cpu_seq = RubySequencer(icache = cache,
+        cpu_seq = RubySequencer(version = i,
+                                icache = cache,
                                 dcache = cache,
                                 physMemPort = phys_mem.port,
                                 physmem = phys_mem)
index 6e248573dcb1523cf24bdc6374b316e1eb85aafb..1cdb6c52299177bbe5e24ea3e82e57e9705f0504 100644 (file)
@@ -76,7 +76,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
         l1d_cache = L1Cache(size = options.l1d_size,
                             assoc = options.l1d_assoc)
 
-        cpu_seq = RubySequencer(icache = l1i_cache,
+        cpu_seq = RubySequencer(version = i,
+                                icache = l1i_cache,
                                 dcache = l1d_cache,
                                 physMemPort = phys_mem.port,
                                 physmem = phys_mem)
index 8d7f7a354a7c00c5d9b7e4f7ee373fa2f0b8c517..849d5b62a7f8b00548c55686d388e0c7bbfbb1bc 100644 (file)
@@ -82,7 +82,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
         l1d_cache = L1Cache(size = options.l1d_size,
                             assoc = options.l1d_assoc)
 
-        cpu_seq = RubySequencer(icache = l1i_cache,
+        cpu_seq = RubySequencer(version = i,
+                                icache = l1i_cache,
                                 dcache = l1d_cache,
                                 physMemPort = phys_mem.port,
                                 physmem = phys_mem)
index 62d86a1e226695e59cc04046355397d40e45f2e3..17fcefb56f49114db964383f9ab224b5631fb57e 100644 (file)
@@ -77,7 +77,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
         l2_cache = L2Cache(size = options.l2_size,
                            assoc = options.l2_assoc)
 
-        cpu_seq = RubySequencer(icache = l1i_cache,
+        cpu_seq = RubySequencer(version = i,
+                                icache = l1i_cache,
                                 dcache = l1d_cache,
                                 physMemPort = phys_mem.port,
                                 physmem = phys_mem)