(no commit message)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index a467de30d8691a0bd05a88449e2e462107d233c9..bafb0b57b7defb8ea5282bec77df73a613edaac2 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -208,7 +208,7 @@ for srcstep in range(VL):
     else
         cond_ok |= el_cond_ok
     # test for VL to be set (and exit)
-    if ~el_cond_ok and VLSET
+    if VLSET and VSb = el_cond_ok then
         if SVRMmode.VLI
             SVSTATE.VL = srcstep+1
         else
@@ -247,7 +247,7 @@ else
 # actual element test here
 cond_ok <- BO[0] | ¬(testbit ^ BO[1])
 # test for VL to be set (and exit)
-if ~cond_ok and VLSET
+if VLSET and cond_ok = VSb then
     if SVRMmode.VLI
         SVSTATE.VL = new_srcstep+1
     else