clarify

diff --git a/nlnet_2019_wishbone_streaming.mdwn b/nlnet_2019_wishbone_streaming.mdwn
index 6101a9194244772976ac9c4e5657b043a2398188..075c9be6cb564a1d2b7c63d48ea2cd09961ba2ca 100644 (file)
--- a/nlnet_2019_wishbone_streaming.mdwn
+++ b/nlnet_2019_wishbone_streaming.mdwn
@@ -21,11 +21,12 @@ if you need any HTML to make your point please include this as attachment.
 
 In projects such as the Libre RISCV SoC, commercial grade communications
 bus infrastructure is needed. Ordinarily this would mean AXI4 however
-it is not only patented but its patent holder has begun denying licenses
-due to the US trade war.
+it is not only patented but its patent holder (ARM) has begun denying
+licenses due to the US trade war.
 
 The main alternative with large adoption is Wishbone. However Wishbone
-does not have "streaming" capability, which is typically needed for
+does not have "streaming" capability (basically the ability to embed
+"timecode" stamps into a data stream), which is typically needed for
 audio and video streaming interfaces.
 
 Therefore this project will write up an enhancement to the Wishbone B4