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diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 2312ec67e73203a981812247ea8154262d7ee8ff..2d2347a5ede7cb4494b2b9d3c839bd207b97823f 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -287,14 +287,17 @@ if VLSET and cond_ok = VSb then
         SVSTATE.VL = new_srcstep
 ```
 
-v3.0B branch pseudocode including LRu
+v3.0B branch pseudocode including LRu and CTR skipping
 
 ```
 if (mode_is_64bit) then M <- 0
 else M <- 32
-if ¬BO[2] then CTR <- CTR - 1
-ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3])
 cond_ok <- BO[0] | ¬(CR[BI+32] ^ BO[1])
+ctrdec = ¬BO[2]
+if CSk & (cond_ok ^ CTi) then
+   ctrdec = 0b0
+if ctrdec then CTR <- CTR - 1
+ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3])
 lr_ok <- SVRMmode.LRu
 if ctr_ok & cond_ok then
   if AA then NIA <-iea EXTS(BD || 0b00)