i965/spirv: Lower shared memory later
authorCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Thu, 8 Aug 2019 17:55:50 +0000 (10:55 -0700)
committerCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Sun, 11 Aug 2019 05:15:35 +0000 (22:15 -0700)
Instead of asking spirv_to_nir to lower the workgroup (shared memory)
to offsets, keep them as derefs longer, then lower it later on.

Because Workgroup memory doesn't have explicit offsets, we need to set
those using nir_lower_vars_to_explicit_types before calling the I/O
lowering pass.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/mesa/drivers/dri/i965/brw_program.c
src/mesa/main/glspirv.c

index b69b032a9c2c933891dc267d37703ed06b7ae49b..8d1d576b87d28a99e4933961a198421e095338bf 100644 (file)
@@ -157,6 +157,18 @@ brw_create_nir(struct brw_context *brw,
    return nir;
 }
 
+static void
+shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
+{
+   assert(glsl_type_is_vector_or_scalar(type));
+
+   uint32_t comp_size = glsl_type_is_boolean(type)
+      ? 4 : glsl_get_bit_size(type) / 8;
+   unsigned length = glsl_get_vector_elements(type);
+   *size = comp_size * length,
+   *align = comp_size * (length == 3 ? 4 : length);
+}
+
 void
 brw_nir_lower_resources(nir_shader *nir, struct gl_shader_program *shader_prog,
                         struct gl_program *prog,
@@ -168,6 +180,14 @@ brw_nir_lower_resources(nir_shader *nir, struct gl_shader_program *shader_prog,
 
    NIR_PASS_V(prog->nir, brw_nir_lower_image_load_store, devinfo);
 
+   if (prog->nir->info.stage == MESA_SHADER_COMPUTE &&
+       shader_prog->data->spirv) {
+      NIR_PASS_V(prog->nir, nir_lower_vars_to_explicit_types,
+                 nir_var_mem_shared, shared_type_info);
+      NIR_PASS_V(prog->nir, nir_lower_explicit_io,
+                 nir_var_mem_shared, nir_address_format_32bit_offset);
+   }
+
    NIR_PASS_V(prog->nir, gl_nir_lower_buffers, shader_prog);
    /* Do a round of constant folding to clean up address calculations */
    NIR_PASS_V(prog->nir, nir_opt_constant_folding);
index 1e1540e570b771f0bf9842c8a89892425a4ad988..08886954d33a852d9e6b89ec291c33c7a2a7afaf 100644 (file)
@@ -245,7 +245,6 @@ _mesa_spirv_to_nir(struct gl_context *ctx,
 
    const struct spirv_to_nir_options spirv_options = {
       .environment = NIR_SPIRV_OPENGL,
-      .lower_workgroup_access_to_offsets = true,
       .frag_coord_is_sysval = ctx->Const.GLSLFragCoordIsSysVal,
       .caps = ctx->Const.SpirVCapabilities,
       .ubo_addr_format = nir_address_format_32bit_index_offset,