add jtag page
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 12:35:38 +0000 (12:35 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 12:35:38 +0000 (12:35 +0000)
shakti/m_class.mdwn
shakti/m_class/JTAG.mdwn [new file with mode: 0644]

index 554c6970736f20ec87a09f242423f7b07f4ab807..c6c9c32a64bb715158435f71ed1a720a63e73cc0 100644 (file)
@@ -214,6 +214,7 @@ TBD
 * 1x [[I2S]] audio with 4-wire output and 1-wire input.
 * 3x USB2 (ULPI for reduced pincount) each capable of USB-OTG support
 * DDR3/DDR3L/LPDDR3 32-bit-wide memory controller
+* [[JTAG]] for debugging
 
 Some interfaces at:
 
@@ -229,6 +230,7 @@ Some interfaces at:
 
 List of Interfaces:
 
+* [[JTAG]]
 * [[I2C]]
 * [[I2S]]
 * [[PWM]]
diff --git a/shakti/m_class/JTAG.mdwn b/shakti/m_class/JTAG.mdwn
new file mode 100644 (file)
index 0000000..6a75bd0
--- /dev/null
@@ -0,0 +1,4 @@
+# JTAG
+
+* <http://processors.wiki.ti.com/index.php/JTAG_(MSP430)#4_Wire_JTAG>
+