soc/integration: uniformize configuration constants declaration in SoCs (use self...

diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py
index b451ef80b184a7207d08c9da789d9f8758a4592f..835acef18ec888bbce66a781dc0ccc4da075bdff 100644 (file)
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@@ -291,7 +291,6 @@ class SoCCore(Module):
             bus_csr=csr_bus.Interface(csr_data_width, csr_address_width))
         self.add_csr_master(self.wishbone2csr.csr)
         self.config["CSR_DATA_WIDTH"] = csr_data_width
-        self.add_constant("CSR_DATA_WIDTH", csr_data_width)
         self.register_mem("csr", self.soc_mem_map["csr"], self.wishbone2csr.wishbone)
 
         # Add UART
@@ -312,7 +311,6 @@ class SoCCore(Module):
             self.submodules.identifier = identifier.Identifier(ident)
             self.add_csr("identifier_mem", allow_user_defined=True)
         self.config["CLOCK_FREQUENCY"] = int(clk_freq)
-        self.add_constant("SYSTEM_CLOCK_FREQUENCY", int(clk_freq))
 
         # Add Timer
         if with_timer:

diff --git a/litex/soc/integration/soc_sdram.py b/litex/soc/integration/soc_sdram.py
index 3e95c0c791fef36f778707e3984d1c9f92fe02cf..27e6f324d4579659e96993bbb1644516c3ef5b88 100644 (file)
--- a/litex/soc/integration/soc_sdram.py
+++ b/litex/soc/integration/soc_sdram.py
@@ -69,7 +69,7 @@ class SoCSDRAM(SoCCore):
         main_ram_size = 2**(geom_settings.bankbits +
                             geom_settings.rowbits +
                             geom_settings.colbits)*phy.settings.databits//8
-        self.add_constant("L2_SIZE", self.l2_size)
+        self.config["L2_SIZE"] = self.l2_size
 
         # add a Wishbone interface to the DRAM
         wb_sdram = wishbone.Interface()

diff --git a/litex/soc/software/bios/boot.c b/litex/soc/software/bios/boot.c
index 10064940480942c568f0261a6a90308621a467fe..be7c9278da4c166bc6d3727fccece2e81c959a13 100644 (file)
--- a/litex/soc/software/bios/boot.c
+++ b/litex/soc/software/bios/boot.c
@@ -40,7 +40,7 @@ static void __attribute__((noreturn)) boot(unsigned long r1, unsigned long r2, u
        flush_cpu_icache();
 #endif
        flush_cpu_dcache();
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        flush_l2_cache();
 #endif
        boot_helper(r1, r2, r3, addr);
@@ -60,7 +60,7 @@ static int check_ack(void)
 
        timer0_en_write(0);
        timer0_reload_write(0);
-       timer0_load_write(SYSTEM_CLOCK_FREQUENCY/4);
+       timer0_load_write(CONFIG_CLOCK_FREQUENCY/4);
        timer0_en_write(1);
        timer0_update_value_write(1);
        recognized = 0;

diff --git a/litex/soc/software/bios/main.c b/litex/soc/software/bios/main.c
index 0c2fe1892da745c8db98a3563f2ed41f7c0f95c6..95b439cb293c11d5ad58b99399f24de536006e32 100644 (file)
--- a/litex/soc/software/bios/main.c
+++ b/litex/soc/software/bios/main.c
@@ -314,7 +314,7 @@ static void do_command(char *c)
        else if(strcmp(token, "crc") == 0) crc(get_token(&c), get_token(&c));
        else if(strcmp(token, "ident") == 0) ident();
 
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        else if(strcmp(token, "flushl2") == 0) flush_l2_cache();
 #endif
 #ifdef CSR_CTRL_BASE
@@ -483,11 +483,11 @@ int main(int i, char **c)
 #else
        printf("Unknown");
 #endif
-       printf(" @ %dMHz\n", SYSTEM_CLOCK_FREQUENCY/1000000);
+       printf(" @ %dMHz\n", CONFIG_CLOCK_FREQUENCY/1000000);
        printf("\e[1mROM\e[0m:       %dKB\n", ROM_SIZE/1024);
        printf("\e[1mSRAM\e[0m:      %dKB\n", SRAM_SIZE/1024);
-#ifdef L2_SIZE
-       printf("\e[1mL2\e[0m:        %dKB\n", L2_SIZE/1024);
+#ifdef CONFIG_L2_SIZE
+       printf("\e[1mL2\e[0m:        %dKB\n", CONFIG_L2_SIZE/1024);
 #endif
 #ifdef MAIN_RAM_SIZE
        printf("\e[1mMAIN-RAM\e[0m:  %dKB\n", MAIN_RAM_SIZE/1024);

diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
index 0edc127cc3f8072afb3c647171c7167c601bc762..b6aa52373a76489053885348d710164829508352 100644 (file)
--- a/litex/soc/software/bios/sdram.c
+++ b/litex/soc/software/bios/sdram.c
@@ -667,7 +667,7 @@ static int memtest_bus(void)
                array[i] = ONEZERO;
        }
        flush_cpu_dcache();
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        flush_l2_cache();
 #endif
        for(i=0;i<MEMTEST_BUS_SIZE/4;i++) {
@@ -684,7 +684,7 @@ static int memtest_bus(void)
                array[i] = ZEROONE;
        }
        flush_cpu_dcache();
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        flush_l2_cache();
 #endif
        for(i=0;i<MEMTEST_BUS_SIZE/4;i++) {
@@ -724,7 +724,7 @@ static int memtest_data(void)
 
        seed_32 = 0;
        flush_cpu_dcache();
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        flush_l2_cache();
 #endif
        for(i=0;i<MEMTEST_DATA_SIZE/4;i++) {
@@ -764,7 +764,7 @@ static int memtest_addr(void)
 
        seed_16 = 0;
        flush_cpu_dcache();
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
        flush_l2_cache();
 #endif
        for(i=0;i<MEMTEST_ADDR_SIZE/4;i++) {

diff --git a/litex/soc/software/libbase/system.c b/litex/soc/software/libbase/system.c
index 8f437bc71f45c10bdfccd08fd3d0d8048db2fe83..bb15aad06e70e188018dff30a0310a5c49944d6a 100644 (file)
--- a/litex/soc/software/libbase/system.c
+++ b/litex/soc/software/libbase/system.c
@@ -106,11 +106,11 @@ void flush_cpu_dcache(void)
 #endif
 }
 
-#ifdef L2_SIZE
+#ifdef CONFIG_L2_SIZE
 void flush_l2_cache(void)
 {
        unsigned int i;
-       for(i=0;i<2*L2_SIZE/4;i++) {
+       for(i=0;i<2*CONFIG_L2_SIZE/4;i++) {
                ((volatile unsigned int *) MAIN_RAM_BASE)[i];
        }
 }

diff --git a/litex/soc/software/libbase/time.c b/litex/soc/software/libbase/time.c
index 9f7f1dbf20d934b02ba462152fffe5041518da7d..2d04d719ff383228c0fa6b1b13b0ae4c8d32aa55 100644 (file)
--- a/litex/soc/software/libbase/time.c
+++ b/litex/soc/software/libbase/time.c
@@ -6,7 +6,7 @@ void time_init(void)
        int t;
 
        timer0_en_write(0);
-       t = 2*SYSTEM_CLOCK_FREQUENCY;
+       t = 2*CONFIG_CLOCK_FREQUENCY;
        timer0_reload_write(t);
        timer0_load_write(t);
        timer0_en_write(1);

diff --git a/litex/soc/software/libnet/microudp.c b/litex/soc/software/libnet/microudp.c
index 31e122144a4ec34b6ba0484dedd4f7bf0c97cce0..1a874894038becdfa5c246179bfd44fe8669f115 100644 (file)
--- a/litex/soc/software/libnet/microudp.c
+++ b/litex/soc/software/libnet/microudp.c
@@ -452,7 +452,7 @@ static void busy_wait(unsigned int ds)
 {
        timer0_en_write(0);
        timer0_reload_write(0);
-       timer0_load_write(SYSTEM_CLOCK_FREQUENCY/10*ds);
+       timer0_load_write(CONFIG_CLOCK_FREQUENCY/10*ds);
        timer0_en_write(1);
        timer0_update_value_write(1);
        while(timer0_value_read()) timer0_update_value_write(1);

diff --git a/litex/tools/remote/csr_builder.py b/litex/tools/remote/csr_builder.py
index 9be8880ab1764a992ab63911032662ba3efbb81a..a06cbe87da5a61b7ac5871e21b29f87e5294899c 100644 (file)
--- a/litex/tools/remote/csr_builder.py
+++ b/litex/tools/remote/csr_builder.py
@@ -65,13 +65,13 @@ class CSRBuilder:
         self.constants = self.build_constants()
 
         # Load csr_data_width from the constants, otherwise it must be provided
-        constant_csr_data_width = self.constants.d.get('csr_data_width', None)
+        constant_csr_data_width = self.constants.d.get("config_csr_data_width", None)
         if csr_data_width is None:
             csr_data_width = constant_csr_data_width
         if csr_data_width is None:
-            raise KeyError('csr_data_width not found in constants, please provide!')
+            raise KeyError("csr_data_width not found in constants, please provide!")
         if csr_data_width != constant_csr_data_width:
-            raise KeyError('csr_data_width of {} provided but {} found in constants'.format(
+            raise KeyError("csr_data_width of {} provided but {} found in constants".format(
                 csr_data_width, constant_csr_data_width))
 
         self.csr_data_width = csr_data_width