radeon/llvm: Move lowering of SETCC node to R600ISelLowering

SI will handle SETCC different from R600, so we need to move it
out of the shared instruction selector.

diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
index b36fe42af9b919dcb1d513450f652a5b04337828..42a9680e2e2ac2126eee722b0d4c3f41bd06728e 100644 (file)
--- a/src/gallium/drivers/radeon/AMDILISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
@@ -520,7 +520,6 @@ AMDILTargetLowering::LowerMemArgument(
     setOperationAction(ISD::SUBC, VT, Expand);
     setOperationAction(ISD::ADDE, VT, Expand);
     setOperationAction(ISD::ADDC, VT, Expand);
-    setOperationAction(ISD::SETCC, VT, Custom);
     setOperationAction(ISD::BRCOND, VT, Custom);
     setOperationAction(ISD::BR_CC, VT, Custom);
     setOperationAction(ISD::BR_JT, VT, Expand);
@@ -581,7 +580,6 @@ AMDILTargetLowering::LowerMemArgument(
     setOperationAction(ISD::SDIVREM, VT, Expand);
     setOperationAction(ISD::SMUL_LOHI, VT, Expand);
     // setOperationAction(ISD::VSETCC, VT, Expand);
-    setOperationAction(ISD::SETCC, VT, Expand);
     setOperationAction(ISD::SELECT_CC, VT, Expand);
     setOperationAction(ISD::SELECT, VT, Expand);
 
@@ -632,7 +630,6 @@ AMDILTargetLowering::LowerMemArgument(
   setOperationAction(ISD::BR_CC, MVT::Other, Custom);
   setOperationAction(ISD::BR_JT, MVT::Other, Expand);
   setOperationAction(ISD::BRIND, MVT::Other, Expand);
-  setOperationAction(ISD::SETCC, MVT::Other, Custom);
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::Other, Expand);
 
   setOperationAction(ISD::BUILD_VECTOR, MVT::Other, Custom);
@@ -849,7 +846,6 @@ AMDILTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
       LOWER(SREM);
       LOWER(BUILD_VECTOR);
       LOWER(SELECT);
-      LOWER(SETCC);
       LOWER(SIGN_EXTEND_INREG);
       LOWER(DYNAMIC_STACKALLOC);
       LOWER(BRCOND);
@@ -1362,37 +1358,6 @@ AMDILTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const
       Op.getValueType(), Cond, LHS, RHS);
   return Cond;
 }
-SDValue
-AMDILTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const
-{
-  SDValue Cond;
-  SDValue LHS = Op.getOperand(0);
-  SDValue RHS = Op.getOperand(1);
-  SDValue CC  = Op.getOperand(2);
-  DebugLoc DL = Op.getDebugLoc();
-  ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
-  unsigned int AMDILCC = CondCCodeToCC(
-      SetCCOpcode,
-      LHS.getValueType().getSimpleVT().SimpleTy);
-  assert((AMDILCC != AMDILCC::COND_ERROR) && "Invalid SetCC!");
-  assert(Op.getValueType() == MVT::i32);
-  Cond = DAG.getNode(
-      ISD::SELECT_CC,
-      Op.getDebugLoc(),
-      MVT::i32,
-      LHS, RHS,
-      DAG.getConstant(-1, MVT::i32),
-      DAG.getConstant(0, MVT::i32),
-      CC);
-  Cond = getConversionNode(DAG, Cond, Op, true);
-  Cond = DAG.getNode(
-      ISD::AND,
-      DL,
-      Cond.getValueType(),
-      DAG.getConstant(1, Cond.getValueType()),
-      Cond);
-  return Cond;
-}
 
 SDValue
 AMDILTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const

diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.h b/src/gallium/drivers/radeon/AMDILISelLowering.h
index 50a4b9ae5cb526c513a92a04e27fe0f4b44db5ba..cccb964e559506b35931661e1bd4ed5ecef7a6ec 100644 (file)
--- a/src/gallium/drivers/radeon/AMDILISelLowering.h
+++ b/src/gallium/drivers/radeon/AMDILISelLowering.h
@@ -183,9 +183,6 @@ namespace llvm
       SDValue
         LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
 
-      SDValue
-        LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
-
       SDValue
         LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
 

diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
index b903b5b58bb51c237c69f2bc805923c5f2fdda1c..9c92498bfdccbe4e412e1f529a8fd261fa4e3cab 100644 (file)
--- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
+++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
@@ -38,6 +38,8 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
   setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
   setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
 
+  setOperationAction(ISD::SETCC, MVT::i32, Custom);
+
   setSchedulingPreference(Sched::VLIW);
 }
 
@@ -273,6 +275,7 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
   default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
   case ISD::ROTL: return LowerROTL(Op, DAG);
   case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
+  case ISD::SETCC: return LowerSETCC(Op, DAG);
   }
 }
 
@@ -394,3 +397,28 @@ SDValue R600TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
 
   return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);
 }
+
+SDValue R600TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const
+{
+  SDValue Cond;
+  SDValue LHS = Op.getOperand(0);
+  SDValue RHS = Op.getOperand(1);
+  SDValue CC  = Op.getOperand(2);
+  DebugLoc DL = Op.getDebugLoc();
+  assert(Op.getValueType() == MVT::i32);
+  Cond = DAG.getNode(
+      ISD::SELECT_CC,
+      Op.getDebugLoc(),
+      MVT::i32,
+      LHS, RHS,
+      DAG.getConstant(-1, MVT::i32),
+      DAG.getConstant(0, MVT::i32),
+      CC);
+  Cond = DAG.getNode(
+      ISD::AND,
+      DL,
+      MVT::i32,
+      DAG.getConstant(1, MVT::i32),
+      Cond);
+  return Cond;
+}

diff --git a/src/gallium/drivers/radeon/R600ISelLowering.h b/src/gallium/drivers/radeon/R600ISelLowering.h
index 7c4157374b6156487f2debb4b867480d8be1c65a..9eb536c5f6f1fd185a60b7c52228ffc6b36d85a2 100644 (file)
--- a/src/gallium/drivers/radeon/R600ISelLowering.h
+++ b/src/gallium/drivers/radeon/R600ISelLowering.h
@@ -42,6 +42,7 @@ private:
   SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
 
   SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
 
 };