X86: Implement MOVNTI.

diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index f88ea89d4df1c2c85088b1e12baaa962934030ae..c2ba399b2ca0d6071445fdd173a7ae19b0f2713e 100644 (file)
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -907,7 +907,7 @@
                         // no prefix
                         0x0: decode OPCODE_OP_BOTTOM3 {
                             0x2: CMPPS(Vo,Wo,Ib);
-                            0x3: WarnUnimpl::movnti_Mdq_Gdq();
+                            0x3: MOVNTI(Mdp,Gdp);
                             0x4: PINSRW(Pq,Ew,Ib);
                             0x5: PEXTRW(Gd,PRq,Ib);
                             0x6: SHUFPS(Vps,Wps,Ib);

diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 560a86e6470fd265b1b185a1a809ffd26188ab7f..7ccdca6c3469f3b5578931ba2da3b95cda41d4dc 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -346,10 +346,17 @@ processDescriptor:
     wrdl reg, t3, t1
     wrsel reg, t1
 };
+
+def macroop MOVNTI_M_R {
+    st reg, seg, sib, disp
+};
+
+def macroop MOVNTI_P_R {
+    rdip t7
+    st reg, seg, riprel, disp
+};
 '''
 #let {{
 #    class MOVD(Inst):
 #       "GenFault ${new UnimpInstFault}"
-#    class MOVNTI(Inst):
-#       "GenFault ${new UnimpInstFault}"
 #}};