move form tables to between mnemonic list and pseudo-code, like the spec does

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 6f7472a4e9b0457329561c981c4c3a5174ee2fb6..f0e7b52ed49ac06758410e5a66e06afeea23349f 100644 (file)
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -403,15 +403,15 @@ as exceptions.
 
 ## Floating Convert From Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
-|-----|------|-------|-------|-------|-------|----|--------|
-| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
-
 ```
     fcvtfg FRT, RB, IT
     fcvtfg. FRT, RB, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
+|-----|------|-------|-------|-------|-------|----|--------|
+| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
+
 ```
     if IT[0] = 0 then  # 32-bit int -> 64-bit float
         # rounding never necessary, so don't touch FPSCR
@@ -474,15 +474,15 @@ Special Registers altered:
 
 ## Floating Convert From Integer In GPR Single
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
-|-----|------|-------|-------|-------|-------|----|--------|
-| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
-
 ```
     fcvtfgs FRT, RB, IT
     fcvtfgs. FRT, RB, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
+|-----|------|-------|-------|-------|-------|----|--------|
+| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
+
 ```
     # rounding may be necessary. based off xscvuxdsp
     reset_xflags()
@@ -667,10 +667,6 @@ Section 7.1 of the ECMAScript / JavaScript
 
 ## Floating Convert To Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
-|-----|------|-------|-------|-------|-------|----|----|---------|
-| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
-
 ```
     fcvttg RT, FRB, CVM, IT
     fcvttg. RT, FRB, CVM, IT
@@ -678,6 +674,10 @@ Section 7.1 of the ECMAScript / JavaScript
     fcvttgo. RT, FRB, CVM, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
+|-----|------|-------|-------|-------|-------|----|----|---------|
+| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
+
 ```
     # based on xscvdpuxws
     reset_xflags()
@@ -812,10 +812,6 @@ Special Registers altered:
 
 ## Floating Convert Single To Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
-|-----|------|-------|-------|-------|-------|----|----|---------|
-| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
-
 ```
     fcvtstg RT, FRB, CVM, IT
     fcvtstg. RT, FRB, CVM, IT
@@ -823,6 +819,10 @@ Special Registers altered:
     fcvtstgo. RT, FRB, CVM, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
+|-----|------|-------|-------|-------|-------|----|----|---------|
+| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
+
 ```
     # based on xscvdpuxws
     reset_xflags()

diff --git a/openpower/sv/rfc/ls006.mdwn b/openpower/sv/rfc/ls006.mdwn
index a9cfa76791fbf850e134abc76aab6f0447b28935..748159182af54afa621e07f0135ea39da3ba2ca1 100644 (file)
--- a/openpower/sv/rfc/ls006.mdwn
+++ b/openpower/sv/rfc/ls006.mdwn
@@ -251,15 +251,15 @@ Special Registers altered:
 
 ## Floating Convert From Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
-|-----|------|-------|-------|-------|-------|----|--------|
-| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
-
 ```
     fcvtfg FRT, RB, IT
     fcvtfg. FRT, RB, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
+|-----|------|-------|-------|-------|-------|----|--------|
+| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
+
 ```
     if IT[0] = 0 then  # 32-bit int -> 64-bit float
         # rounding never necessary, so don't touch FPSCR
@@ -326,15 +326,15 @@ Special Registers altered:
 
 ## Floating Convert From Integer In GPR Single
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
-|-----|------|-------|-------|-------|-------|----|--------|
-| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
-
 ```
     fcvtfgs FRT, RB, IT
     fcvtfgs. FRT, RB, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-30 | 31 | Form   |
+|-----|------|-------|-------|-------|-------|----|--------|
+| PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
+
 ```
     # rounding may be necessary. based off xscvuxdsp
     reset_xflags()
@@ -531,10 +531,6 @@ Section 7.1 of the ECMAScript / JavaScript
 
 ## Floating Convert To Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
-|-----|------|-------|-------|-------|-------|----|----|---------|
-| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
-
 ```
     fcvttg RT, FRB, CVM, IT
     fcvttg. RT, FRB, CVM, IT
@@ -542,6 +538,10 @@ Section 7.1 of the ECMAScript / JavaScript
     fcvttgo. RT, FRB, CVM, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
+|-----|------|-------|-------|-------|-------|----|----|---------|
+| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
+
 ```
     # based on xscvdpuxws
     reset_xflags()
@@ -680,10 +680,6 @@ Special Registers altered:
 
 ## Floating Convert Single To Integer In GPR
 
-| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
-|-----|------|-------|-------|-------|-------|----|----|---------|
-| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
-
 ```
     fcvtstg RT, FRB, CVM, IT
     fcvtstg. RT, FRB, CVM, IT
@@ -691,6 +687,10 @@ Special Registers altered:
     fcvtstgo. RT, FRB, CVM, IT
 ```
 
+| 0-5 | 6-10 | 11-12 | 13-15 | 16-20 | 21-29 | 30 | 31 | Form    |
+|-----|------|-------|-------|-------|-------|----|----|---------|
+| PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
+
 ```
     # based on xscvdpuxws
     reset_xflags()