powerful Vector augmentation system, with very little in the way of
additional opcodes required: simply external "context".
-x86 was originally only 70 instructions: prior to AVX512 1,400 additional ibsteuctions have been added, almost all of them related to SIMD.
+x86 was originally only 80 instructions: prior to AVX512 over 1,300 additional instructions have been added, almost all of them SIMD.
RISC-V RVV as of version 0.9 is over 188 instructions (more than the
rest of RV64G combined: 80 for RV64G and 27 for C). Over 95% of that functionality is added to