radeon/llvm: Fix instruction encoding for r600 family GPUs

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
https://bugs.freedesktop.org/show_bug.cgi?id=55217

diff --git a/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp b/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp
index 847fcb62d4e12c02e529f40782e29a223a573560..a11f48234cb392e06c4263cafd2375898dfa1407 100644 (file)
--- a/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp
@@ -218,8 +218,8 @@ void R600MCCodeEmitter::EmitALUInstr(const MCInst &MI,
 
   //older alu have different encoding for instructions with one or two src
   //parameters.
-  if (STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst &&
-      MI.getNumOperands() < 4) {
+  if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) &&
+      !(MCDesc.TSFlags & R600_InstFlag::OP3)) {
     uint64_t ISAOpCode = InstWord01 & (0x3FFULL << 39);
     InstWord01 &= ~(0x3FFULL << 39);
     InstWord01 |= ISAOpCode << 1;

diff --git a/src/gallium/drivers/radeon/R600Defines.h b/src/gallium/drivers/radeon/R600Defines.h
index 655b9844592f32ceb367e2f6bba2f0222c881c46..20c357cc15fb4789376f703c6d176c67e042491d 100644 (file)
--- a/src/gallium/drivers/radeon/R600Defines.h
+++ b/src/gallium/drivers/radeon/R600Defines.h
@@ -21,3 +21,15 @@
 // operand.
 #define GET_FLAG_OPERAND_IDX(Flags) (((Flags) >> 7) & 0x3)
 
+namespace R600_InstFlag {
+       enum TIF {
+               TRANS_ONLY = (1 << 0),
+               TEX = (1 << 1),
+               REDUCTION = (1 << 2),
+               FC = (1 << 3),
+               TRIG = (1 << 4),
+               OP3 = (1 << 5),
+               VECTOR = (1 << 6)
+    //FlagOperand bits 7, 8
+       };
+}

diff --git a/src/gallium/drivers/radeon/R600InstrInfo.h b/src/gallium/drivers/radeon/R600InstrInfo.h
index bfe8d034e35ae27c67e305610ff2b64de61a35b6..de82542fa2c94307e08204e030e00d5d58b7f248 100644 (file)
--- a/src/gallium/drivers/radeon/R600InstrInfo.h
+++ b/src/gallium/drivers/radeon/R600InstrInfo.h
@@ -129,17 +129,4 @@ namespace llvm {
 
 } // End llvm namespace
 
-namespace R600_InstFlag {
-       enum TIF {
-               TRANS_ONLY = (1 << 0),
-               TEX = (1 << 1),
-               REDUCTION = (1 << 2),
-               FC = (1 << 3),
-               TRIG = (1 << 4),
-               OP3 = (1 << 5),
-               VECTOR = (1 << 6)
-    //FlagOperand bits 7, 8
-       };
-}
-
 #endif // R600INSTRINFO_H_