i965: Move annotation info into generate code.
authorMatt Turner <mattst88@gmail.com>
Sun, 25 May 2014 17:42:32 +0000 (10:42 -0700)
committerMatt Turner <mattst88@gmail.com>
Mon, 2 Jun 2014 22:17:29 +0000 (15:17 -0700)
Suggested by Ken as a way to cut down lines of code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs.h
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
src/mesa/drivers/dri/i965/brw_vec4.h
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp

index 527c3f3bf582a72b9e5165baa031fb283c8edc6c..d91b9666f92d77d88c7ffa001ae179a3a82769b3 100644 (file)
@@ -615,8 +615,7 @@ public:
                                      unsigned *assembly_size);
 
 private:
-   void generate_code(exec_list *instructions,
-                      struct annotation_info *annotation);
+   void generate_code(exec_list *instructions);
    void generate_fb_write(fs_inst *inst);
    void generate_blorp_fb_write(fs_inst *inst);
    void generate_pixel_xy(struct brw_reg dst, bool is_x);
@@ -743,8 +742,7 @@ public:
                                      unsigned *assembly_size);
 
 private:
-   void generate_code(exec_list *instructions,
-                      struct annotation_info *annotation);
+   void generate_code(exec_list *instructions);
    void generate_fb_write(fs_inst *inst);
    void generate_linterp(fs_inst *inst, struct brw_reg dst,
                          struct brw_reg *src);
index 554c196df5d2945416bee23c492d55df4b6cf810..4ca70392903f42fbda8abeaab95ba48808c8b528 100644 (file)
@@ -1322,8 +1322,7 @@ fs_generator::generate_untyped_surface_read(fs_inst *inst, struct brw_reg dst,
 }
 
 void
-fs_generator::generate_code(exec_list *instructions,
-                            struct annotation_info *annotation)
+fs_generator::generate_code(exec_list *instructions)
 {
    if (unlikely(debug_flag)) {
       if (prog) {
@@ -1341,6 +1340,11 @@ fs_generator::generate_code(exec_list *instructions,
       }
    }
 
+   int start_offset = p->next_insn_offset;
+
+   struct annotation_info annotation;
+   memset(&annotation, 0, sizeof(annotation));
+
    cfg_t *cfg = NULL;
    if (unlikely(debug_flag))
       cfg = new(mem_ctx) cfg_t(instructions);
@@ -1351,7 +1355,7 @@ fs_generator::generate_code(exec_list *instructions,
       unsigned int last_insn_offset = p->next_insn_offset;
 
       if (unlikely(debug_flag))
-         annotate(brw, annotation, cfg, inst, p->next_insn_offset);
+         annotate(brw, &annotation, cfg, inst, p->next_insn_offset);
 
       for (unsigned int i = 0; i < inst->sources; i++) {
         src[i] = brw_reg_from_fs_reg(&inst->src[i]);
@@ -1752,7 +1756,7 @@ fs_generator::generate_code(exec_list *instructions,
           */
          if (!patch_discard_jumps_to_fb_writes()) {
             if (unlikely(debug_flag)) {
-               annotation->ann_count--;
+               annotation.ann_count--;
             }
          }
          break;
@@ -1779,7 +1783,18 @@ fs_generator::generate_code(exec_list *instructions,
    }
 
    brw_set_uip_jip(p);
-   annotation_finalize(annotation, p->next_insn_offset);
+   annotation_finalize(&annotation, p->next_insn_offset);
+
+   brw_compact_instructions(p, start_offset, annotation.ann_count,
+                            annotation.ann);
+
+   if (unlikely(debug_flag)) {
+      const struct gl_program *prog = fp ? &fp->Base : NULL;
+
+      dump_assembly(p->store, annotation.ann_count, annotation.ann,
+                    brw, prog, brw_disassemble);
+      ralloc_free(annotation.ann);
+   }
 }
 
 const unsigned *
@@ -1789,21 +1804,9 @@ fs_generator::generate_assembly(exec_list *simd8_instructions,
 {
    assert(simd8_instructions || simd16_instructions);
 
-   const struct gl_program *prog = fp ? &fp->Base : NULL;
-
    if (simd8_instructions) {
-      struct annotation_info annotation;
-      memset(&annotation, 0, sizeof(annotation));
-
       dispatch_width = 8;
-      generate_code(simd8_instructions, &annotation);
-      brw_compact_instructions(p, 0, annotation.ann_count, annotation.ann);
-
-      if (unlikely(debug_flag)) {
-         dump_assembly(p->store, annotation.ann_count, annotation.ann,
-                       brw, prog, brw_disassemble);
-         ralloc_free(annotation.ann);
-      }
+      generate_code(simd8_instructions);
    }
 
    if (simd16_instructions) {
@@ -1817,19 +1820,8 @@ fs_generator::generate_assembly(exec_list *simd8_instructions,
 
       brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
-      struct annotation_info annotation;
-      memset(&annotation, 0, sizeof(annotation));
-
       dispatch_width = 16;
-      generate_code(simd16_instructions, &annotation);
-      brw_compact_instructions(p, prog_data->prog_offset_16,
-                               annotation.ann_count, annotation.ann);
-
-      if (unlikely(debug_flag)) {
-         dump_assembly(p->store, annotation.ann_count, annotation.ann,
-                       brw, prog, brw_disassemble);
-         ralloc_free(annotation.ann);
-      }
+      generate_code(simd16_instructions);
    }
 
    return brw_get_program(p, assembly_size);
index fd58b3c8401a16935771cb32b01350fa6595d873..c2bbd68edf66645dfb28767d067049a94664c5d3 100644 (file)
@@ -646,8 +646,7 @@ public:
    const unsigned *generate_assembly(exec_list *insts, unsigned *asm_size);
 
 private:
-   void generate_code(exec_list *instructions,
-                      struct annotation_info *annotation);
+   void generate_code(exec_list *instructions);
    void generate_vec4_instruction(vec4_instruction *inst,
                                   struct brw_reg dst,
                                   struct brw_reg *src);
@@ -748,8 +747,7 @@ public:
    const unsigned *generate_assembly(exec_list *insts, unsigned *asm_size);
 
 private:
-   void generate_code(exec_list *instructions,
-                      struct annotation_info *annotation);
+   void generate_code(exec_list *instructions);
    void generate_vec4_instruction(vec4_instruction *inst,
                                   struct brw_reg dst,
                                   struct brw_reg *src);
index 0791df64c6ec24bb32b683bc44ca0fd519e1ad89..c62de999027645920e379230c478724cb5145d5e 100644 (file)
@@ -1261,8 +1261,7 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
 }
 
 void
-vec4_generator::generate_code(exec_list *instructions,
-                              struct annotation_info *annotation)
+vec4_generator::generate_code(exec_list *instructions)
 {
    if (unlikely(debug_flag)) {
       if (shader_prog) {
@@ -1274,6 +1273,9 @@ vec4_generator::generate_code(exec_list *instructions,
       }
    }
 
+   struct annotation_info annotation;
+   memset(&annotation, 0, sizeof(annotation));
+
    cfg_t *cfg = NULL;
    if (unlikely(debug_flag))
       cfg = new(mem_ctx) cfg_t(instructions);
@@ -1283,7 +1285,7 @@ vec4_generator::generate_code(exec_list *instructions,
       struct brw_reg src[3], dst;
 
       if (unlikely(debug_flag))
-         annotate(brw, annotation, cfg, inst, p->next_insn_offset);
+         annotate(brw, &annotation, cfg, inst, p->next_insn_offset);
 
       for (unsigned int i = 0; i < 3; i++) {
         src[i] = inst->get_src(this->prog_data, i);
@@ -1317,18 +1319,8 @@ vec4_generator::generate_code(exec_list *instructions,
    }
 
    brw_set_uip_jip(p);
-   annotation_finalize(annotation, p->next_insn_offset);
-}
+   annotation_finalize(&annotation, p->next_insn_offset);
 
-const unsigned *
-vec4_generator::generate_assembly(exec_list *instructions,
-                                  unsigned *assembly_size)
-{
-   struct annotation_info annotation;
-   memset(&annotation, 0, sizeof(annotation));
-
-   brw_set_default_access_mode(p, BRW_ALIGN_16);
-   generate_code(instructions, &annotation);
    brw_compact_instructions(p, 0, annotation.ann_count, annotation.ann);
 
    if (unlikely(debug_flag)) {
@@ -1336,6 +1328,14 @@ vec4_generator::generate_assembly(exec_list *instructions,
                     brw, prog, brw_disassemble);
       ralloc_free(annotation.ann);
    }
+}
+
+const unsigned *
+vec4_generator::generate_assembly(exec_list *instructions,
+                                  unsigned *assembly_size)
+{
+   brw_set_default_access_mode(p, BRW_ALIGN_16);
+   generate_code(instructions);
 
    return brw_get_program(p, assembly_size);
 }
index 6755398d042a42b58b793221932e0fbaacbbf890..51ce4a757829cfd45e6c1162972a67c5c7a36cae 100644 (file)
@@ -884,8 +884,7 @@ gen8_fs_generator::generate_untyped_surface_read(fs_inst *ir,
 }
 
 void
-gen8_fs_generator::generate_code(exec_list *instructions,
-                                 struct annotation_info *annotation)
+gen8_fs_generator::generate_code(exec_list *instructions)
 {
    if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
       if (prog) {
@@ -903,6 +902,9 @@ gen8_fs_generator::generate_code(exec_list *instructions,
       }
    }
 
+   struct annotation_info annotation;
+   memset(&annotation, 0, sizeof(annotation));
+
    cfg_t *cfg = NULL;
    if (unlikely(INTEL_DEBUG & DEBUG_WM))
       cfg = new(mem_ctx) cfg_t(instructions);
@@ -912,7 +914,7 @@ gen8_fs_generator::generate_code(exec_list *instructions,
       struct brw_reg src[3], dst;
 
       if (unlikely(INTEL_DEBUG & DEBUG_WM))
-         annotate(brw, annotation, cfg, ir, next_inst_offset);
+         annotate(brw, &annotation, cfg, ir, next_inst_offset);
 
       for (unsigned int i = 0; i < 3; i++) {
          src[i] = brw_reg_from_fs_reg(&ir->src[i]);
@@ -1245,7 +1247,7 @@ gen8_fs_generator::generate_code(exec_list *instructions,
           */
          if (!patch_discard_jumps_to_fb_writes()) {
             if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-               annotation->ann_count--;
+               annotation.ann_count--;
             }
          }
          break;
@@ -1262,7 +1264,13 @@ gen8_fs_generator::generate_code(exec_list *instructions,
    }
 
    patch_jump_targets();
-   annotation_finalize(annotation, next_inst_offset);
+   annotation_finalize(&annotation, next_inst_offset);
+
+   if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+      dump_assembly(store, annotation.ann_count, annotation.ann, brw, prog,
+                    gen8_disassemble);
+      ralloc_free(annotation.ann);
+   }
 }
 
 const unsigned *
@@ -1273,17 +1281,8 @@ gen8_fs_generator::generate_assembly(exec_list *simd8_instructions,
    assert(simd8_instructions || simd16_instructions);
 
    if (simd8_instructions) {
-      struct annotation_info annotation;
-      memset(&annotation, 0, sizeof(annotation));
-
       dispatch_width = 8;
-      generate_code(simd8_instructions, &annotation);
-
-      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-         dump_assembly(store, annotation.ann_count, annotation.ann, brw, prog,
-                       gen8_disassemble);
-         ralloc_free(annotation.ann);
-      }
+      generate_code(simd8_instructions);
    }
 
    if (simd16_instructions) {
@@ -1294,17 +1293,8 @@ gen8_fs_generator::generate_assembly(exec_list *simd8_instructions,
       /* Save off the start of this SIMD16 program */
       prog_data->prog_offset_16 = next_inst_offset;
 
-      struct annotation_info annotation;
-      memset(&annotation, 0, sizeof(annotation));
-
       dispatch_width = 16;
-      generate_code(simd16_instructions, &annotation);
-
-      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-         dump_assembly(store, annotation.ann_count, annotation.ann,
-                       brw, prog, gen8_disassemble);
-         ralloc_free(annotation.ann);
-      }
+      generate_code(simd16_instructions);
    }
 
    *assembly_size = next_inst_offset;
index c291a9d64bb15e837547e4083be23e9022eed9ca..590c75447e5d086e880a12f6485f728988a18aec 100644 (file)
@@ -842,8 +842,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
 }
 
 void
-gen8_vec4_generator::generate_code(exec_list *instructions,
-                                   struct annotation_info *annotation)
+gen8_vec4_generator::generate_code(exec_list *instructions)
 {
    if (unlikely(debug_flag)) {
       if (shader_prog) {
@@ -855,6 +854,9 @@ gen8_vec4_generator::generate_code(exec_list *instructions,
       }
    }
 
+   struct annotation_info annotation;
+   memset(&annotation, 0, sizeof(annotation));
+
    cfg_t *cfg = NULL;
    if (unlikely(debug_flag))
       cfg = new(mem_ctx) cfg_t(instructions);
@@ -864,7 +866,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions,
       struct brw_reg src[3], dst;
 
       if (unlikely(debug_flag))
-         annotate(brw, annotation, cfg, ir, next_inst_offset);
+         annotate(brw, &annotation, cfg, ir, next_inst_offset);
 
       for (unsigned int i = 0; i < 3; i++) {
          src[i] = ir->get_src(prog_data, i);
@@ -892,25 +894,22 @@ gen8_vec4_generator::generate_code(exec_list *instructions,
    }
 
    patch_jump_targets();
-   annotation_finalize(annotation, next_inst_offset);
+   annotation_finalize(&annotation, next_inst_offset);
+
+   if (unlikely(debug_flag)) {
+      dump_assembly(store, annotation.ann_count, annotation.ann,
+                    brw, prog, gen8_disassemble);
+      ralloc_free(annotation.ann);
+   }
 }
 
 const unsigned *
 gen8_vec4_generator::generate_assembly(exec_list *instructions,
                                        unsigned *assembly_size)
 {
-   struct annotation_info annotation;
-   memset(&annotation, 0, sizeof(annotation));
-
    default_state.access_mode = BRW_ALIGN_16;
    default_state.exec_size = BRW_EXECUTE_8;
-   generate_code(instructions, &annotation);
-
-   if (unlikely(debug_flag)) {
-      dump_assembly(store, annotation.ann_count, annotation.ann,
-                    brw, prog, gen8_disassemble);
-      ralloc_free(annotation.ann);
-   }
+   generate_code(instructions);
 
    *assembly_size = next_inst_offset;
    return (const unsigned *) store;