sdram/module: fix tREFI on AS4C16M16

diff --git a/misoclib/mem/sdram/module.py b/misoclib/mem/sdram/module.py
index 4572c001d7f495c3d72e35182900ce244c374f0b..c0c47fbb86b90c2fda7b7fb99dc6eec7d8abe271 100644 (file)
--- a/misoclib/mem/sdram/module.py
+++ b/misoclib/mem/sdram/module.py
@@ -93,7 +93,7 @@ class AS4C16M16(SDRAMModule):
                "tRCD":         18,
                "tWR":          12,
                "tWTR":         2,
-               "tREFI":        256*1000*1000/4096,
+               "tREFI":        7800,
                "tRFC":         60
        }
        def __init__(self, clk_freq):