<ul>
<li>GL_AMD_pinned_memory on r600, radeonsi</li>
<li>GL_ARB_draw_instanced on freedreno</li>
+<li>GL_ARB_instanced_arrays on freedreno</li>
<li>GL_ARB_pipeline_statistics_query on i965, nvc0, r600, radeonsi, softpipe</li>
</ul>
A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(vb->stride) |
COND(switchnext, A3XX_VFD_FETCH_INSTR_0_SWITCHNEXT) |
A3XX_VFD_FETCH_INSTR_0_INDEXCODE(j) |
- A3XX_VFD_FETCH_INSTR_0_STEPRATE(1));
+ COND(elem->instance_divisor, A3XX_VFD_FETCH_INSTR_0_INSTANCED) |
+ A3XX_VFD_FETCH_INSTR_0_STEPRATE(MAX2(1, elem->instance_divisor)));
OUT_RELOC(ring, rsc->bo, vb->buffer_offset + elem->src_offset, 0, 0);
OUT_PKT0(ring, REG_A3XX_VFD_DECODE_INSTR(j), 1);
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
- case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_START_INSTANCE:
case PIPE_CAP_COMPUTE:
return 0;
return is_a3xx(screen) || is_a4xx(screen);
case PIPE_CAP_TGSI_INSTANCEID:
+ case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
return is_a3xx(screen) && glsl130;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: