sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m.
authorJakub Jelinek <jakub@redhat.com>
Thu, 2 Jun 2016 11:02:26 +0000 (13:02 +0200)
committerJakub Jelinek <jakub@gcc.gnu.org>
Thu, 2 Jun 2016 11:02:26 +0000 (13:02 +0200)
* config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of
x=x,x and v=v,m instead of x=x,m.

* gcc.target/i386/avx512vl-concatv4si-1.c: New test.

From-SVN: r237031

gcc/ChangeLog
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c [new file with mode: 0644]

index bff651298429babd426973d7d34c917d58c41f87..6c983ac1df1d448f972d4ea0f607a4cbcb02750c 100644 (file)
@@ -1,5 +1,8 @@
 2016-06-02  Jakub Jelinek  <jakub@redhat.com>
 
+       * config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of
+       x=x,x and v=v,m instead of x=x,m.
+
        * config/i386/sse.md (*vec_concatv2si_sse4_1): Add avx512dq v=Yv,rm
        alternative.  Change x=x,x alternative to v=Yv,Yv and x=rm,C
        alternative to v=rm,C.
index 2a11887adb019297bfb04e773b1fdaf4b5b849e9..5e7460841a0ce875a7e2763b2561fd6f4e1bdff1 100644 (file)
    (set_attr "mode" "TI,TI,DI,V4SF,SF,DI,DI")])
 
 (define_insn "*vec_concatv4si"
-  [(set (match_operand:V4SI 0 "register_operand"       "=x,x,x,x,x")
+  [(set (match_operand:V4SI 0 "register_operand"       "=x,v,x,x,v")
        (vec_concat:V4SI
-         (match_operand:V2SI 1 "register_operand"     " 0,x,0,0,x")
-         (match_operand:V2SI 2 "nonimmediate_operand" " x,x,x,m,m")))]
+         (match_operand:V2SI 1 "register_operand"     " 0,v,0,0,v")
+         (match_operand:V2SI 2 "nonimmediate_operand" " x,v,x,m,m")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t{%2, %0|%0, %2}
    vmovhps\t{%2, %1, %0|%0, %1, %q2}"
   [(set_attr "isa" "sse2_noavx,avx,noavx,noavx,avx")
    (set_attr "type" "sselog,sselog,ssemov,ssemov,ssemov")
-   (set_attr "prefix" "orig,vex,orig,orig,vex")
+   (set_attr "prefix" "orig,maybe_evex,orig,orig,maybe_evex")
    (set_attr "mode" "TI,TI,V4SF,V2SF,V2SF")])
 
 ;; movd instead of movq is required to handle broken assemblers.
index 3d279fdbf036a17946d96effe3fffa270e2c1408..c4b2f2510a4f5659e3fc501a6fe928b28ff9d125 100644 (file)
@@ -1,5 +1,7 @@
 2016-06-02  Jakub Jelinek  <jakub@redhat.com>
 
+       * gcc.target/i386/avx512vl-concatv4si-1.c: New test.
+
        * gcc.target/i386/avx512dq-concatv2si-1.c: New test.
        * gcc.target/i386/avx512vl-concatv2si-1.c: New test.
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c
new file mode 100644 (file)
index 0000000..88d4682
--- /dev/null
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx512vl" } */
+
+typedef int V __attribute__((vector_size (8)));
+typedef int W __attribute__((vector_size (16)));
+
+void
+f1 (V x, V y)
+{
+  register W c __asm ("xmm16");
+  c = (W) { x[0], x[1], x[0], x[1] };
+  asm volatile ("" : "+v" (c));
+}
+
+void
+f2 (V x, V *y)
+{
+  register W c __asm ("xmm16");
+  c = (W) { x[0], x[1], (*y)[0], (*y)[1] };
+  asm volatile ("" : "+v" (c));
+}
+
+/* { dg-final { scan-assembler-times "vpunpcklqdq\[^\n\r]*xmm16" 2 } } */