(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index f8582d156e4484bbd36adad632f9a9de44f59376..e1970d82ee2bc311ff297f35d7cf0149fc4fd628 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -32,9 +32,9 @@ defined in the Prefix Fields section.
 
 ## MASK Encoding
 
-TODO: split out (remove) bit 3 as separate so that twin predication can use the same encoding, and split thr table into 2 halves. The bit currently 3 becomes a separate (standalone) field (see [discussion])
+TODO: split out (remove) bit 3 as separate so that twin predication can use the same encoding, and split the table into 2 halves. The bit currently 3 becomes a separate (standalone) field (see [discussion]) that selects *both* src and dest predication as CR based or both as INT based.  This saves one bit and makes things less complex.
 
-Integer based predication.  Twin predication uses the same encoding rhus allowing either the same register (r3 or r10) to be used for both srcand dest, or different regs (one for src, one for dest)
+Integer based predication.  Twin predication uses the same encoding thus allowing either the same register (r3 or r10) to be used for both src and dest, or different regs (one for src, one for dest)
 
 | Value | Mnemonic          | Description                                            |
 |-------|-------------------|--------------------------------------------------------|