anv/pipline: Re-order state emission and make it consistent

This commit makes both gen7 and gen8 pipeline setup emit state packets
in exactly the same order.

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 02f18e715918684c299896d9f43799a7e1ee6dfe..192175658fb77761c05be85726dd69e3830a24a0 100644 (file)
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -68,9 +68,8 @@ genX(graphics_pipeline_create)(
    assert(pCreateInfo->pRasterizationState);
    emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
                  pCreateInfo->pMultisampleState, pass, subpass);
-
+   emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
    emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
-
    emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
                            pCreateInfo->pMultisampleState);
 
@@ -80,8 +79,6 @@ genX(graphics_pipeline_create)(
                      pCreateInfo->pRasterizationState);
    emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
 
-   emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
-
 #if 0 
    /* From gen7_vs_state.c */
 
@@ -104,8 +101,8 @@ genX(graphics_pipeline_create)(
    emit_3dstate_vs(pipeline);
    emit_3dstate_gs(pipeline);
    emit_3dstate_sbe(pipeline);
-   emit_3dstate_ps(pipeline);
    emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
+   emit_3dstate_ps(pipeline);
 
    *pPipeline = anv_pipeline_to_handle(pipeline);
 

diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 186d0401f3546fc1d15fd2e5a833545141b96d07..3980be5b55e867ba1ab6261e36b57e9fb5a19829 100644 (file)
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -64,7 +64,6 @@ genX(graphics_pipeline_create)(
 
    assert(pCreateInfo->pVertexInputState);
    emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
-   emit_3dstate_vf_topology(pipeline);
    assert(pCreateInfo->pRasterizationState);
    emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
                  pCreateInfo->pMultisampleState, pass, subpass);
@@ -79,12 +78,13 @@ genX(graphics_pipeline_create)(
                      pCreateInfo->pRasterizationState);
    emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
 
-   emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
-   emit_3dstate_gs(pipeline);
    emit_3dstate_vs(pipeline);
+   emit_3dstate_gs(pipeline);
    emit_3dstate_sbe(pipeline);
+   emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
    emit_3dstate_ps(pipeline);
    emit_3dstate_ps_extra(pipeline);
+   emit_3dstate_vf_topology(pipeline);
 
    *pPipeline = anv_pipeline_to_handle(pipeline);