add twin L0 cache/buffer diagram

diff --git a/3d_gpu/architecture/6600scoreboard.mdwn b/3d_gpu/architecture/6600scoreboard.mdwn
index 7e6aa652764f436ba72978fad8c7f85216bff355..1ee935f4931bea0cc54e99497049e98ddb9715a3 100644 (file)
--- a/3d_gpu/architecture/6600scoreboard.mdwn
+++ b/3d_gpu/architecture/6600scoreboard.mdwn
@@ -336,6 +336,13 @@ conditions are as follows:
 
 [[!img mem_l0_to_l1_bridge.png size="600x"]]
 
+Twin L0 cache/buffer design
+
+[Flaws](https://bugs.libre-soc.org/show_bug.cgi?id=216#c24)
+in the above were detected, and needed correction.
+
+[[!img twin_l0_cache_buffer.jpg size="600x"]]
+
 # Multi-input/output Dependency Cell and Computation Unit
 
 * <https://www.youtube.com/watch?v=ohHbWRLDCfs>