/* SVGA3D has one ref/mask/writemask triple shared between front &
* back face stencil. We really need two:
*/
- unsigned stencil_ref:8;
unsigned stencil_mask:8;
unsigned stencil_writemask:8;
struct pipe_poly_stipple poly_stipple;
struct pipe_scissor_state scissor;
struct pipe_blend_color blend_color;
+ struct pipe_stencil_ref stencil_ref;
struct pipe_clip_state clip;
struct pipe_viewport_state viewport;
#define SVGA_NEW_VS_RESULT 0x1000000
#define SVGA_NEW_ZERO_STRIDE 0x2000000
#define SVGA_NEW_TEXTURE_FLAGS 0x4000000
+#define SVGA_NEW_STENCIL_REF 0x8000000
/* SVGA3D has one ref/mask/writemask triple shared between front &
* back face stencil. We really need two:
*/
- ds->stencil_ref = templ->stencil[0].ref_value & 0xff;
ds->stencil_mask = templ->stencil[0].valuemask & 0xff;
ds->stencil_writemask = templ->stencil[0].writemask & 0xff;
}
ds->stencil[1].zfail = svga_translate_stencil_op(templ->stencil[1].zfail_op);
ds->stencil[1].pass = svga_translate_stencil_op(templ->stencil[1].zpass_op);
- ds->stencil_ref = templ->stencil[1].ref_value & 0xff;
ds->stencil_mask = templ->stencil[1].valuemask & 0xff;
ds->stencil_writemask = templ->stencil[1].writemask & 0xff;
}
}
+static void svga_set_stencil_ref( struct pipe_context *pipe,
+ const struct pipe_stencil_ref *stencil_ref )
+{
+ struct svga_context *svga = svga_context(pipe);
+
+ svga->curr.stencil_ref = *stencil_ref;
+
+ svga->dirty |= SVGA_NEW_STENCIL_REF;
+}
+
void svga_init_depth_stencil_functions( struct svga_context *svga )
{
svga->pipe.create_depth_stencil_alpha_state = svga_create_depth_stencil_state;
svga->pipe.bind_depth_stencil_alpha_state = svga_bind_depth_stencil_state;
svga->pipe.delete_depth_stencil_alpha_state = svga_delete_depth_stencil_state;
+
+ svga->pipe.set_stencil_ref = svga_set_stencil_ref;
}
#include "util/u_inlines.h"
#include "pipe/p_defines.h"
#include "util/u_math.h"
+#if 0
+#include "util/u_pack_color.h"
+#endif
#include "svga_context.h"
#include "svga_state.h"
}
}
+#if 0
+ /* FIXME: shouldn't we emit blend color here */
+ if (dirty & SVGA_NEW_BLEND_COLOR) {
+ union util_color uc;
+ ubyte r = float_to_ubyte(svga->curr.blend_color.color[0]);
+ ubyte g = float_to_ubyte(svga->curr.blend_color.color[1]);
+ ubyte b = float_to_ubyte(svga->curr.blend_color.color[2]);
+ ubyte a = float_to_ubyte(svga->curr.blend_color.color[3]);
+
+ util_pack_color_ub( r, g, b, a,
+ PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
+
+ EMIT_RS( svga, uc.ui, BLENDCOLOR, fail );
+ }
+#endif
+
+
if (dirty & (SVGA_NEW_DEPTH_STENCIL | SVGA_NEW_RAST)) {
const struct svga_depth_stencil_state *curr = svga->curr.depth;
EMIT_RS( svga, curr->stencil[0].fail, STENCILFAIL, fail );
EMIT_RS( svga, curr->stencil[0].zfail, STENCILZFAIL, fail );
EMIT_RS( svga, curr->stencil[0].pass, STENCILPASS, fail );
-
- EMIT_RS( svga, curr->stencil_ref, STENCILREF, fail );
+
EMIT_RS( svga, curr->stencil_mask, STENCILMASK, fail );
EMIT_RS( svga, curr->stencil_writemask, STENCILWRITEMASK, fail );
}
EMIT_RS( svga, curr->stencil[ccw].zfail, CCWSTENCILZFAIL, fail );
EMIT_RS( svga, curr->stencil[ccw].pass, CCWSTENCILPASS, fail );
- EMIT_RS( svga, curr->stencil_ref, STENCILREF, fail );
EMIT_RS( svga, curr->stencil_mask, STENCILMASK, fail );
EMIT_RS( svga, curr->stencil_writemask, STENCILWRITEMASK, fail );
}
}
}
+ if (dirty & SVGA_NEW_STENCIL_REF) {
+ EMIT_RS( svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail );
+ }
if (dirty & SVGA_NEW_RAST)
{
"hw rss state",
(SVGA_NEW_BLEND |
+#if 0
+ SVGA_NEW_BLEND_COLOR |
+#endif
SVGA_NEW_DEPTH_STENCIL |
+ SVGA_NEW_STENCIL_REF |
SVGA_NEW_RAST |
SVGA_NEW_FRAME_BUFFER |
SVGA_NEW_NEED_PIPELINE),