i965/fs: Enable register spilling on gen7 too.

It turns out the same messages work on gen7, we were just being paranoid.

Fixes the penumbra shadows mode of Lightsmark since the register
allocation fix.

NOTE: This is a candidate for release branches.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 45f83f3dbcb57b9b8c9aedbded22e6e2ec165099..3a9a415cd706832cab15327cd542e090ae9de084 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -237,8 +237,6 @@ fs_visitor::assign_regs()
 
       if (reg == -1) {
         fail("no register to spill\n");
-      } else if (intel->gen >= 7) {
-        fail("no spilling support on gen7 yet\n");
       } else if (c->dispatch_width == 16) {
         fail("no spilling support on 16-wide yet\n");
       } else {