Test switching between SPI/SPU.
authorAndrew Cagney <cagney@redhat.com>
Fri, 13 Feb 1998 05:19:02 +0000 (05:19 +0000)
committerAndrew Cagney <cagney@redhat.com>
Fri, 13 Feb 1998 05:19:02 +0000 (05:19 +0000)
sim/testsuite/d10v-elf/ChangeLog
sim/testsuite/d10v-elf/Makefile.in
sim/testsuite/d10v-elf/t-sp.s [new file with mode: 0644]
sim/testsuite/d10v-elf/t-trap.s [new file with mode: 0644]

index b040b34fcb93ab314c6659ad99aa6d31aac3ecea..28530c008e2349d3bcb73b880c5b302db0ce891d 100644 (file)
@@ -1,3 +1,8 @@
+Fri Feb 13 16:21:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * t-sp.s: New test.
+       * Makefile.in (TESTS): Update.
+
 Wed Feb 11 17:58:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * t-macros.i: Update trap calls, func in r4, args in
index 07d22d2473513e31a9597ec292193a776e1b5ed6..92dc121fdad2167a392f82c97a3dc7681f760354 100644 (file)
@@ -48,6 +48,8 @@ TESTS = \
        t-rac.ok \
        t-rachi.ok \
        t-rep.ok \
+       t-rte.ok \
+       t-sp.ok \
        t-sub2w.ok \
        t-sub.ok \
        t-subi.ok \
diff --git a/sim/testsuite/d10v-elf/t-sp.s b/sim/testsuite/d10v-elf/t-sp.s
new file mode 100644 (file)
index 0000000..84f9ad4
--- /dev/null
@@ -0,0 +1,17 @@
+.include "t-macros.i"
+
+       start
+
+;;; Read/Write values to SPU/SPI
+
+       loadpsw2 0
+       ldi sp, 0xdead
+       loadpsw2 PSW_SM
+       ldi sp, 0xbeef
+       
+       loadpsw2 0
+       check 1 sp 0xdead
+       loadpsw2 PSW_SM
+       check 2 sp 0xbeef
+
+       exit0
diff --git a/sim/testsuite/d10v-elf/t-trap.s b/sim/testsuite/d10v-elf/t-trap.s
new file mode 100644 (file)
index 0000000..6ac4ae0
--- /dev/null
@@ -0,0 +1,5 @@
+.include "t-macros.i"
+
+       start
+
+       exit47