r600g,radeonsi: cleanup of hex literals

0x3F800000 -> fui(1.0)
0x00000000 -> 0

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index bc634fe5e36933d763cb3c1e991273601105d939..8aa8082e8bca252fe4a2bf85415fdc9c4eb855f8 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2296,17 +2296,17 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
        r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * 16);
        for (tmp = 0; tmp < 16; tmp++) {
                r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */
-               r600_store_value(cb, 0x3F800000); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
+               r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
        }
 
        r600_store_context_reg(cb, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA);
        r600_store_context_reg(cb, R_028820_PA_CL_NANINF_CNTL, 0);
 
        r600_store_context_reg_seq(cb, CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
-       r600_store_value(cb, 0x3F800000); /* CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* CM_R_028BEC_PA_CL_GB_VERT_DISC_ADJ */
-       r600_store_value(cb, 0x3F800000); /* CM_R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* CM_R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* CM_R_028BEC_PA_CL_GB_VERT_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* CM_R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* CM_R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */
 
        r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
        r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
@@ -2730,7 +2730,7 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
        r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * 16);
        for (tmp = 0; tmp < 16; tmp++) {
                r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */
-               r600_store_value(cb, 0x3F800000); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
+               r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
        }
 
        r600_store_context_reg(cb, R_0286DC_SPI_FOG_CNTL, 0);
@@ -2742,10 +2742,10 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
        r600_store_value(cb, 0); /* R_028AC8_DB_PRELOAD_CONTROL */
 
        r600_store_context_reg_seq(cb, R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 4);
-       r600_store_value(cb, 0x3F800000); /* R_028C0C_PA_CL_GB_VERT_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C10_PA_CL_GB_VERT_DISC_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C14_PA_CL_GB_HORZ_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C18_PA_CL_GB_HORZ_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C0C_PA_CL_GB_VERT_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C10_PA_CL_GB_VERT_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C14_PA_CL_GB_HORZ_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C18_PA_CL_GB_HORZ_DISC_ADJ */
 
        r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
        r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 9d35c17170826117428d236b029d8d53050f1187..26d7300e0e9cc23a0bf46a2b93968cefcb15542b 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2382,15 +2382,15 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
        r600_store_context_reg(cb, R_028A48_PA_SC_MPASS_PS_CNTL, 0);
 
        r600_store_context_reg_seq(cb, R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 4);
-       r600_store_value(cb, 0x3F800000); /* R_028C0C_PA_CL_GB_VERT_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C10_PA_CL_GB_VERT_DISC_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C14_PA_CL_GB_HORZ_CLIP_ADJ */
-       r600_store_value(cb, 0x3F800000); /* R_028C18_PA_CL_GB_HORZ_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C0C_PA_CL_GB_VERT_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C10_PA_CL_GB_VERT_DISC_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C14_PA_CL_GB_HORZ_CLIP_ADJ */
+       r600_store_value(cb, fui(1.0)); /* R_028C18_PA_CL_GB_HORZ_DISC_ADJ */
 
        r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * 16);
        for (tmp = 0; tmp < 16; tmp++) {
                r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */
-               r600_store_value(cb, 0x3F800000); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
+               r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */
        }
 
        r600_store_context_reg(cb, R_028200_PA_SC_WINDOW_OFFSET, 0);

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index a08124bed162d138c9c05a8a6ae0278efc9538b1..a4778dfb7bf8979dcdf8a48705cf0fd1ea2da1e0 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1025,7 +1025,7 @@ static void r600_setup_buffer_constants(struct r600_context *rctx, int shader_ty
                                if (desc->channel[0].pure_integer)
                                        samplers->buffer_constants[offset+4] = 1;
                                else
-                                       samplers->buffer_constants[offset+4] = 0x3f800000;
+                                       samplers->buffer_constants[offset+4] = fui(1.0);
                        } else
                                samplers->buffer_constants[offset + 4] = 0;
 

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index db8af210c6aa986d73f73ed62f42f8defc9a5ebc..4b4f8fbdd21bf6208650a09254c1e1ec2e03a2c4 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3043,7 +3043,7 @@ void si_init_config(struct si_context *sctx)
        si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT, 0);
 
        si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0);
-       si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0x00000000);
+       si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0);
        si_pm4_set_reg(pm4, R_028AB8_VGT_VTX_CNT_EN, 0x0);
        if (sctx->b.chip_class < CIK)
                si_pm4_set_reg(pm4, R_008A14_PA_CL_ENHANCE, S_008A14_NUM_CLIP_SEQ(3) |
@@ -3058,7 +3058,7 @@ void si_init_config(struct si_context *sctx)
                switch (sctx->screen->b.family) {
                case CHIP_BONAIRE:
                        si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x16000012);
-                       si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0x00000000);
+                       si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0);
                        break;
                case CHIP_HAWAII:
                        si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x3a00161a);
@@ -3071,8 +3071,8 @@ void si_init_config(struct si_context *sctx)
                case CHIP_MULLINS:
                        /* XXX todo */
                default:
-                       si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000000);
-                       si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0x00000000);
+                       si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0);
+                       si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0);
                        break;
                }
        } else {
@@ -3092,12 +3092,12 @@ void si_init_config(struct si_context *sctx)
                        raster_config = 0x00000082;
                        break;
                case CHIP_HAINAN:
-                       raster_config = 0x00000000;
+                       raster_config = 0;
                        break;
                default:
                        fprintf(stderr,
                                "radeonsi: Unknown GPU, using 0 for raster_config\n");
-                       raster_config = 0x00000000;
+                       raster_config = 0;
                        break;
                }
 
@@ -3124,16 +3124,16 @@ void si_init_config(struct si_context *sctx)
        si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA);
        /* PA_SU_HARDWARE_SCREEN_OFFSET must be 0 due to hw bug on SI */
        si_pm4_set_reg(pm4, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0);
-       si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0, 0x00000000);
-       si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0, 0x3F800000);
-       si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0x00000000);
-       si_pm4_set_reg(pm4, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 0x3F800000);
-       si_pm4_set_reg(pm4, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, 0x3F800000);
-       si_pm4_set_reg(pm4, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ, 0x3F800000);
-       si_pm4_set_reg(pm4, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ, 0x3F800000);
-       si_pm4_set_reg(pm4, R_028020_DB_DEPTH_BOUNDS_MIN, 0x00000000);
-       si_pm4_set_reg(pm4, R_028024_DB_DEPTH_BOUNDS_MAX, 0x00000000);
-       si_pm4_set_reg(pm4, R_028028_DB_STENCIL_CLEAR, 0x00000000);
+       si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0, 0);
+       si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0, fui(1.0));
+       si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0);
+       si_pm4_set_reg(pm4, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, fui(1.0));
+       si_pm4_set_reg(pm4, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, fui(1.0));
+       si_pm4_set_reg(pm4, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ, fui(1.0));
+       si_pm4_set_reg(pm4, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ, fui(1.0));
+       si_pm4_set_reg(pm4, R_028020_DB_DEPTH_BOUNDS_MIN, 0);
+       si_pm4_set_reg(pm4, R_028024_DB_DEPTH_BOUNDS_MAX, 0);
+       si_pm4_set_reg(pm4, R_028028_DB_STENCIL_CLEAR, 0);
        si_pm4_set_reg(pm4, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0);
        si_pm4_set_reg(pm4, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0);
        si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0);