Fix CPS availability.

2015-10-29  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
    * config/tc-arm.c (insns): Guard cps by arm_ext_v6_notm instead of
    arm_ext_v6_dsp.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fb94201b2eb6c1d31a62b517f6fcdefc6c9aab21..1df8a1d1f4d9ed3834f312e117d3b13e3088113f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-10-29  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (insns): Guard cps by arm_ext_v6_notm instead of
+       arm_ext_v6_dsp.
+
 2015-10-28  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * config/tc-arc.c (tokenize_arguments): Avoid creating unused

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 14bebe829f51c814116517eeea7dc10692d28ab8..025e0be7305dd8c81373b8d2ebba0ef39711d203 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -18892,11 +18892,11 @@ static const struct asm_opcode insns[] =
   UF(srsed,    8400500,           2, (oRRw, I31w),                srs),
  TUF("srsdb",  9400500, e800c000, 2, (oRRw, I31w),                srs,  srs),
  TUF("srsfd",  9400500, e800c000, 2, (oRRw, I31w),                srs,  srs),
+ TUF("cps",    1020000, f3af8100, 1, (I31b),                     imm0, t_cps),
 
 /*  ARM V6 not included in V7M (eg. integer SIMD).  */
 #undef  THUMB_VARIANT
 #define THUMB_VARIANT  & arm_ext_v6_dsp
- TUF("cps",    1020000, f3af8100, 1, (I31b),                     imm0, t_cps),
  TCE("pkhbt",  6800010, eac00000, 4, (RRnpc, RRnpc, RRnpc, oSHll),   pkhbt, t_pkhbt),
  TCE("pkhtb",  6800050, eac00020, 4, (RRnpc, RRnpc, RRnpc, oSHar),   pkhtb, t_pkhtb),
  TCE("qadd16", 6200f10, fa90f010, 3, (RRnpc, RRnpc, RRnpc),       rd_rn_rm, t_simd),