(no commit message)

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index a6055f1d2e8699ed6192bd71a5f0bd716485d4c4..dd9d2846f3be91503ef6c03bba1fcc037fcfe880 100644 (file)
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -141,9 +141,7 @@ by SimpleV:
   (VSX Rijndael and SHA primitives; VSX shuffle and bitpermute operations)
 * register files above 128 entries
 * Vector lengths over 64
-* Unit-strided LD/ST and other comprehensive memory operations
-  (struct-based LD/ST from RVV for example)
-* 32-bit instruction lengths. [[svp64]] had to be added as 64 bit.
+* 32-bit instruction lengths. [[sv/svp64]] had to be added as 64 bit.
 
 These limitations, which stem inherently from the adaptation process of
 starting from a Scalar ISA, are not insurmountable. Over time, they may