minor rework of po9_encoding table

diff --git a/openpower/sv/po9_encoding.mdwn b/openpower/sv/po9_encoding.mdwn
index 0ba5c96b96c427e6a815599d4b68c939cd99ba54..7d047ca6428a07401d40e2656b47f88bb8562327 100644 (file)
--- a/openpower/sv/po9_encoding.mdwn
+++ b/openpower/sv/po9_encoding.mdwn
@@ -70,34 +70,34 @@ is required (identifying whether the Suffix - Defined Word-instruction - is
 Arithmetic/Logical, CR-op, Load/Store or Branch-Conditional), adding
 "Unvectorizable" to this phase is not unreasonable.*
 
-# New 64-bit Instruction Encoding spaces
+# New Prefixed Instruction Encoding space
 
 **Proposal: Add new Section 1.6.5 to Book I**
 
-The following seven new areas are defined within Primary Opcode 9 (EXT009)
-as a new 64-bit encoding space, alongside Primary Opcode 1
-(EXT1xx).
-
-|0-5| 6-29   |30 31|32-37   | 38-63  | Description      |
-|---|--------|-----|--------|--------|------------------|
-|PO9| xxxx   | x x | 010001 |  ////  | RESERVED(1)      |
-|PO9| xxxx   | x x | 000001 |  ////  | RESERVED(2)      |
-|PO9| !ZERO  | 1 1 |  !PO9  | nnnn   | SVP64Single:EXT200-263 |
-|PO9|  0000  | 1 1 |  !PO9  | nnnn   | Scalar EXT200-263  |
-|PO9|  SVRM  | 1 0 |  !PO9  | nnnn   | SVP64:EXT200-263   |
-|PO9|  0000  | 0 1 | DWd    | nnnn   | 32-bit EXT300-363  |
-|PO9| !ZERO  | 0 1 | DWd    | nnnn   | SVP64Single:EXT000-063 |
-|PO9|  SVRM  | 0 0 | DWd    | nnnn   | SVP64:EXT000-063   |
+The following eight new `RESERVED` areas are defined within
+Primary Opcode 9 (EXT009)
+
+|0-5| 6-29   |30 31|32-37   | 38-63 | Description      |
+|---|--------|-----|--------|-------|------------------|
+|PO9| xxxx   | x x | 010001 | xxxx  | RESERVED(1)      |
+|PO9| xxxx   | x x | 000001 | xxxx  | RESERVED(2)      |
+|PO9| !ZERO  | 1 1 |  !PO9  | nnnn  | SVP64Single:EXT200-263 |
+|PO9|  0000  | 1 1 |  !PO9  | nnnn  | Scalar EXT200-263  |
+|PO9|  SVRM  | 1 0 |  !PO9  | nnnn  | SVP64:EXT200-263   |
+|PO9|  0000  | 0 1 | DWd    | nnnn  | 32-bit EXT300-363  |
+|PO9| !ZERO  | 0 1 | DWd    | nnnn  | SVP64Single:EXT000-063 |
+|PO9|  SVRM  | 0 0 | DWd    | nnnn  | SVP64:EXT000-063   |
 
 Key:
 
 * **x** - a `RESERVED` encoding. Illegal Instruction Trap must be raised
-* **n** - a specification-defined value (currently `RESERVED`)
-* **!ZERO** - a non-zero specification-defined value
+* **n** - a future specification-defined value (currently `RESERVED`)
+* **!PO9** - any 6-bit binary value except Primary Opcode 9 (0b010001)
+* **!ZERO** - a non-zero futre specification-defined value (currently `RESERVED`)
 * **DWd** - a "Defined Word-instruction" - Book I Section 1.6 (Public v3.1 p11)
 * **SVRM** - a `RESERVED` encoding
-* **SVP64Single**: a `RESERVED` encoding
-* **SVP64**: a `RESERVED` Loop-Prefix encoding
+* **SVP64Single**: a future `RESERVED` encoding
+* **SVP64**: a future `RESERVED` Loop-Prefix encoding
 * **EXT200-263**: a `RESERVED` encoding for future Scalar instructions
 * **EXT300-363**: a `RESERVED` encoding for future Scalar instructions