(no commit message)

diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn
index 0b967f36600e0a6fa1717d347d5069fe144e71ba..423cb47b3ab503e3d5a21e50eddca66e9899ba2e 100644 (file)
--- a/openpower/sv/svp64_quirks.mdwn
+++ b/openpower/sv/svp64_quirks.mdwn
@@ -27,7 +27,8 @@ exempts element width overrides,
 which still do not actually modify the meaning of the instruction:
 an add remains an add, even if its override makes it an 8-bit add rather than
 a 64-bit add. Even add-with-carry remains an add-with-carry: it's just
-that when elwidth=8 in the Prefix it's an *8-bit* add-with-carry.
+that when elwidth=8 in the Prefix it's an *8-bit* add-with-carry,
+where the 9th bit becomes Carry-out, not the 65th bit.
 In other words, elwidth overrides **definitely** do not fundamentally
 alter the actual
 Scalar v3.0 ISA encoding itself.  Consequently we can still, in