add link to https://bugs.libre-soc.org/show_bug.cgi?id=996

diff --git a/openpower/sv/rfc/ls004.mdwn b/openpower/sv/rfc/ls004.mdwn
index e3f71751a4289a64a7e427ac9fed63f4c139d1ce..f5d4d6b7a0df467fd1a301452ba1142c52e02cc6 100644 (file)
--- a/openpower/sv/rfc/ls004.mdwn
+++ b/openpower/sv/rfc/ls004.mdwn
@@ -7,6 +7,7 @@
 * <https://bugs.libre-soc.org/show_bug.cgi?id=960>
 * <https://git.openpower.foundation/isa/PowerISA/issues/91>
 * shift-and-add <https://bugs.libre-soc.org/show_bug.cgi?id=968>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=996>
 
 **Severity**: Major
 
@@ -73,6 +74,8 @@ Replaces a pair of explicit instructions in hot-loops.
    and zero-extended.
 3. Both are 2-in 1-out instructions.
 
+TODO: signed 32-bit shift-and-add should probably be added or replace shadduw, this needs to be addressed before submitting the RFC: <https://bugs.libre-soc.org/show_bug.cgi?id=996>
+
 **Changes**
 
 Add the following entries to: