radeon/vcn/dec: add db_aligned_height to message buffer
authorLeo Liu <leo.liu@amd.com>
Thu, 11 Jun 2020 23:27:57 +0000 (19:27 -0400)
committerLeo Liu <leo.liu@amd.com>
Thu, 18 Jun 2020 13:58:03 +0000 (09:58 -0400)
This is required for Sienna

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

src/gallium/drivers/radeon/radeon_vcn_dec.c

index 1e83ef3dc7ba31176229d9d9e7d4a6b3e4740f3e..6bc60061aab742b7fe8f88ae0c8f6019916914cb 100644 (file)
@@ -824,6 +824,10 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
                        dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
                          ? align(dec->base.width, 64)
                          : align(dec->base.width, 32);
+   if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA &&
+       dec->stream_type == RDECODE_CODEC_VP9)
+      decode->db_aligned_height = align(dec->base.height, 64);
+
    decode->db_surf_tile_config = 0;
 
    decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;