MemCmd: Add a command for invalidation requests to LSQ

This command will be sent from the memory system (Ruby) to the LSQ of
an O3 CPU so that the LSQ, if it needs to, invalidates the address in
the request packet.

diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 64f4fcd14716e143db5d9d7fee160b5ea0b0ff7d..4c3a785dce4b337a0627d869d4f56d650403edd5 100644 (file)
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -168,6 +168,9 @@ MemCmd::commandInfo[] =
     { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
     /* Flush Request */
     { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" },
+    /* Invalidation Request */
+    { SET3(NeedsExclusive, IsInvalidate, IsRequest),
+      InvalidCmd, "InvalidationReq" },
 };
 
 bool

diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 6347c21ea443f39b0deac07d5a93ffc07e3d3dc7..e49ce757766a926b47c24a9ae32f5f23b84b7781 100644 (file)
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -108,6 +108,7 @@ class MemCmd
         // Fake simulator-only commands
         PrintReq,       // Print state matching address
         FlushReq,      //request for a cache flush
+        InvalidationReq,   // request for address to be invalidated from lsq
         NUM_MEM_CMDS
     };