}
};
-struct ShregmapTechXilinx7 : ShregmapTech
+struct ShregmapTechXilinx7Dynamic : ShregmapTech
{
dict<SigBit, std::tuple<Cell*,int,int>> sigbit_to_shiftx_offset;
const ShregmapOptions &opts;
- ShregmapTechXilinx7(const ShregmapOptions &opts) : opts(opts) {}
+ ShregmapTechXilinx7Dynamic(const ShregmapOptions &opts) : opts(opts) {}
virtual void init(const Module* module, const SigMap &sigmap) override
{
opts.zinit = true;
opts.tech = new ShregmapTechGreenpak4;
}
- else if (tech == "xilinx") {
+ else if (tech == "xilinx_dynamic") {
opts.init = true;
opts.params = true;
enpol = "any_or_none";
- opts.tech = new ShregmapTechXilinx7(opts);
+ opts.tech = new ShregmapTechXilinx7Dynamic(opts);
} else {
argidx--;
break;
// shregmap operates on bit-level flops, not word-level,
// so break those down here
run("simplemap t:$dff t:$dffe", "(skip if '-nosrl')");
- // shregmap with '-tech xilinx' infers variable length shift regs
- run("shregmap -tech xilinx -minlen 3", "(skip if '-nosrl')");
+ // shregmap to infer variable length shift regs
+ run("shregmap -tech xilinx_dynamic -minlen 3", "(skip if '-nosrl')");
}
std::string techmap_files = " -map +/techmap.v";