# CR weird instructions
-[[sv/int_cr_predication]] is by far the biggest violator of the SVP64
+[[openpower/sv/int_cr_predication]] is by far the biggest violator of the SVP64
rules, for good reasons. Transfers between Vectors of CR Fields and Integers
for use as predicates is very awkward without them.
indices are isolated behind a single Vector Hazard, there is no
problem at all. `sv.mv.x` is also fraught, precisely because it
sits on top of a Standard Scalar register paradigm, not a Vector
-ISA, with separate and distinct Vector registers.
+ISA with separate and distinct Vector registers.
To help partly solve this, `sv.mv.x` would have had to have
been made relative: