re PR target/20276 (64bit PPC target uses __adddi3)
authorDavid Edelsohn <edelsohn@gnu.org>
Wed, 2 Mar 2005 18:57:30 +0000 (18:57 +0000)
committerDavid Edelsohn <dje@gcc.gnu.org>
Wed, 2 Mar 2005 18:57:30 +0000 (13:57 -0500)
PR target/20276
* config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo.
(reg_or_sub_cint64_operand): Same.

From-SVN: r95789

gcc/ChangeLog
gcc/config/rs6000/predicates.md

index c9ec502e9ab51419878aa11a95f67410c5b2fbec..363916cf1d50303016100a4ca6945891717fd5ad 100644 (file)
@@ -1,3 +1,9 @@
+2005-03-02  David Edelsohn  <edelsohn@gnu.org>
+
+       PR target/20276
+       * config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo.
+       (reg_or_sub_cint64_operand): Same.
+
 2005-03-02  Jeff Law  <law@redhat.com>
 
        * tree-ssa-dom.c (tree_ssa_dominator_optimize): Fix setting of
index 10e12af99fe753914d2e8cec80b78d54919a0c79..5cafb4c60f6272ebbfc9c33deb188f5ee9086400 100644 (file)
 (define_predicate "reg_or_add_cint64_operand"
   (if_then_else (match_code "const_int")
     (match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000)
-                || ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80000000)
+                || ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80008000)
                     < (unsigned HOST_WIDE_INT) 0x100000000ll)")
     (match_operand 0 "gpc_reg_operand")))
 
 (define_predicate "reg_or_sub_cint64_operand"
   (if_then_else (match_code "const_int")
     (match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000)
-                || ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80000000)
+                || ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80008000)
                     < (unsigned HOST_WIDE_INT) 0x100000000ll)")
     (match_operand 0 "gpc_reg_operand")))