nir/nir_opt_peephole_ffma: Move this lowering pass to the i965 driver
authorEduardo Lima Mitev <elima@igalia.com>
Thu, 22 Oct 2015 13:25:23 +0000 (15:25 +0200)
committerEduardo Lima Mitev <elima@igalia.com>
Tue, 10 Nov 2015 20:13:35 +0000 (21:13 +0100)
Because the next patch will add an optimization that is specific to i965,
we want to move this loweing pass to that driver altogether.

This is safe because i965 is the only consumer.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
src/glsl/Makefile.sources
src/glsl/nir/nir.h
src/glsl/nir/nir_opt_peephole_ffma.c [deleted file]
src/mesa/drivers/dri/i965/Makefile.sources
src/mesa/drivers/dri/i965/brw_nir.c
src/mesa/drivers/dri/i965/brw_nir.h
src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c [new file with mode: 0644]

index 78d295b8e91d9bf18a180fac6166a3466c5a316b..d4b02c17b0d6bd8f051a391422540448757a5209 100644 (file)
@@ -67,7 +67,6 @@ NIR_FILES = \
        nir/nir_opt_dead_cf.c \
        nir/nir_opt_gcm.c \
        nir/nir_opt_global_to_local.c \
-       nir/nir_opt_peephole_ffma.c \
        nir/nir_opt_peephole_select.c \
        nir/nir_opt_remove_phis.c \
        nir/nir_opt_undef.c \
index 13ebbcae564f1a9f899c3dad80244d72b9a439ac..4ed2cbd2b6718c5f969d75007f82aa08bc0e1c70 100644 (file)
@@ -2029,7 +2029,6 @@ bool nir_opt_dead_cf(nir_shader *shader);
 void nir_opt_gcm(nir_shader *shader);
 
 bool nir_opt_peephole_select(nir_shader *shader);
-bool nir_opt_peephole_ffma(nir_shader *shader);
 
 bool nir_opt_remove_phis(nir_shader *shader);
 
diff --git a/src/glsl/nir/nir_opt_peephole_ffma.c b/src/glsl/nir/nir_opt_peephole_ffma.c
deleted file mode 100644 (file)
index 4f0f0da..0000000
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Jason Ekstrand (jason@jlekstrand.net)
- *
- */
-
-#include "nir.h"
-
-/*
- * Implements a small peephole optimization that looks for a multiply that
- * is only ever used in an add and replaces both with an fma.
- */
-
-struct peephole_ffma_state {
-   void *mem_ctx;
-   nir_function_impl *impl;
-   bool progress;
-};
-
-static inline bool
-are_all_uses_fadd(nir_ssa_def *def)
-{
-   if (!list_empty(&def->if_uses))
-      return false;
-
-   nir_foreach_use(def, use_src) {
-      nir_instr *use_instr = use_src->parent_instr;
-
-      if (use_instr->type != nir_instr_type_alu)
-         return false;
-
-      nir_alu_instr *use_alu = nir_instr_as_alu(use_instr);
-      switch (use_alu->op) {
-      case nir_op_fadd:
-         break; /* This one's ok */
-
-      case nir_op_imov:
-      case nir_op_fmov:
-      case nir_op_fneg:
-      case nir_op_fabs:
-         assert(use_alu->dest.dest.is_ssa);
-         if (!are_all_uses_fadd(&use_alu->dest.dest.ssa))
-            return false;
-         break;
-
-      default:
-         return false;
-      }
-   }
-
-   return true;
-}
-
-static nir_alu_instr *
-get_mul_for_src(nir_alu_src *src, int num_components,
-                uint8_t swizzle[4], bool *negate, bool *abs)
-{
-   uint8_t swizzle_tmp[4];
-   assert(src->src.is_ssa && !src->abs && !src->negate);
-
-   nir_instr *instr = src->src.ssa->parent_instr;
-   if (instr->type != nir_instr_type_alu)
-      return NULL;
-
-   nir_alu_instr *alu = nir_instr_as_alu(instr);
-   switch (alu->op) {
-   case nir_op_imov:
-   case nir_op_fmov:
-      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
-      break;
-
-   case nir_op_fneg:
-      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
-      *negate = !*negate;
-      break;
-
-   case nir_op_fabs:
-      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
-      *negate = false;
-      *abs = true;
-      break;
-
-   case nir_op_fmul:
-      /* Only absorb a fmul into a ffma if the fmul is is only used in fadd
-       * operations.  This prevents us from being too aggressive with our
-       * fusing which can actually lead to more instructions.
-       */
-      if (!are_all_uses_fadd(&alu->dest.dest.ssa))
-         return NULL;
-      break;
-
-   default:
-      return NULL;
-   }
-
-   if (!alu)
-      return NULL;
-
-   /* Copy swizzle data before overwriting it to avoid setting a wrong swizzle.
-    *
-    * Example:
-    *   Former swizzle[] = xyzw
-    *   src->swizzle[] = zyxx
-    *
-    *   Expected output swizzle = zyxx
-    *   If we reuse swizzle in the loop, then output swizzle would be zyzz.
-    */
-   memcpy(swizzle_tmp, swizzle, 4*sizeof(uint8_t));
-   for (int i = 0; i < num_components; i++)
-      swizzle[i] = swizzle_tmp[src->swizzle[i]];
-
-   return alu;
-}
-
-static bool
-nir_opt_peephole_ffma_block(nir_block *block, void *void_state)
-{
-   struct peephole_ffma_state *state = void_state;
-
-   nir_foreach_instr_safe(block, instr) {
-      if (instr->type != nir_instr_type_alu)
-         continue;
-
-      nir_alu_instr *add = nir_instr_as_alu(instr);
-      if (add->op != nir_op_fadd)
-         continue;
-
-      /* TODO: Maybe bail if this expression is considered "precise"? */
-
-      assert(add->src[0].src.is_ssa && add->src[1].src.is_ssa);
-
-      /* This, is the case a + a.  We would rather handle this with an
-       * algebraic reduction than fuse it.  Also, we want to only fuse
-       * things where the multiply is used only once and, in this case,
-       * it would be used twice by the same instruction.
-       */
-      if (add->src[0].src.ssa == add->src[1].src.ssa)
-         continue;
-
-      nir_alu_instr *mul;
-      uint8_t add_mul_src, swizzle[4];
-      bool negate, abs;
-      for (add_mul_src = 0; add_mul_src < 2; add_mul_src++) {
-         for (unsigned i = 0; i < 4; i++)
-            swizzle[i] = i;
-
-         negate = false;
-         abs = false;
-
-         mul = get_mul_for_src(&add->src[add_mul_src],
-                               add->dest.dest.ssa.num_components,
-                               swizzle, &negate, &abs);
-
-         if (mul != NULL)
-            break;
-      }
-
-      if (mul == NULL)
-         continue;
-
-      nir_ssa_def *mul_src[2];
-      mul_src[0] = mul->src[0].src.ssa;
-      mul_src[1] = mul->src[1].src.ssa;
-
-      if (abs) {
-         for (unsigned i = 0; i < 2; i++) {
-            nir_alu_instr *abs = nir_alu_instr_create(state->mem_ctx,
-                                                      nir_op_fabs);
-            abs->src[0].src = nir_src_for_ssa(mul_src[i]);
-            nir_ssa_dest_init(&abs->instr, &abs->dest.dest,
-                              mul_src[i]->num_components, NULL);
-            abs->dest.write_mask = (1 << mul_src[i]->num_components) - 1;
-            nir_instr_insert_before(&add->instr, &abs->instr);
-            mul_src[i] = &abs->dest.dest.ssa;
-         }
-      }
-
-      if (negate) {
-         nir_alu_instr *neg = nir_alu_instr_create(state->mem_ctx,
-                                                   nir_op_fneg);
-         neg->src[0].src = nir_src_for_ssa(mul_src[0]);
-         nir_ssa_dest_init(&neg->instr, &neg->dest.dest,
-                           mul_src[0]->num_components, NULL);
-         neg->dest.write_mask = (1 << mul_src[0]->num_components) - 1;
-         nir_instr_insert_before(&add->instr, &neg->instr);
-         mul_src[0] = &neg->dest.dest.ssa;
-      }
-
-      nir_alu_instr *ffma = nir_alu_instr_create(state->mem_ctx, nir_op_ffma);
-      ffma->dest.saturate = add->dest.saturate;
-      ffma->dest.write_mask = add->dest.write_mask;
-
-      for (unsigned i = 0; i < 2; i++) {
-         ffma->src[i].src = nir_src_for_ssa(mul_src[i]);
-         for (unsigned j = 0; j < add->dest.dest.ssa.num_components; j++)
-            ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];
-      }
-      nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src], ffma);
-
-      assert(add->dest.dest.is_ssa);
-
-      nir_ssa_dest_init(&ffma->instr, &ffma->dest.dest,
-                        add->dest.dest.ssa.num_components,
-                        add->dest.dest.ssa.name);
-      nir_ssa_def_rewrite_uses(&add->dest.dest.ssa,
-                               nir_src_for_ssa(&ffma->dest.dest.ssa));
-
-      nir_instr_insert_before(&add->instr, &ffma->instr);
-      assert(list_empty(&add->dest.dest.ssa.uses));
-      nir_instr_remove(&add->instr);
-
-      state->progress = true;
-   }
-
-   return true;
-}
-
-static bool
-nir_opt_peephole_ffma_impl(nir_function_impl *impl)
-{
-   struct peephole_ffma_state state;
-
-   state.mem_ctx = ralloc_parent(impl);
-   state.impl = impl;
-   state.progress = false;
-
-   nir_foreach_block(impl, nir_opt_peephole_ffma_block, &state);
-
-   if (state.progress)
-      nir_metadata_preserve(impl, nir_metadata_block_index |
-                                  nir_metadata_dominance);
-
-   return state.progress;
-}
-
-bool
-nir_opt_peephole_ffma(nir_shader *shader)
-{
-   bool progress = false;
-
-   nir_foreach_overload(shader, overload) {
-      if (overload->impl)
-         progress |= nir_opt_peephole_ffma_impl(overload->impl);
-   }
-
-   return progress;
-}
index 434583defe314c6775d3d0a0d8cf04c787e20491..f5e84cb7f6503a8e9ed9a650771a35522104c6f7 100644 (file)
@@ -46,6 +46,7 @@ i965_compiler_FILES = \
        brw_nir.h \
        brw_nir.c \
        brw_nir_analyze_boolean_resolves.c \
+       brw_nir_opt_peephole_ffma.c \
        brw_nir_uniforms.cpp \
        brw_packed_float.c \
        brw_predicated_break.cpp \
index dece208233f7d48778106f41059c6ebae9cf6b04..fe5cad4e435aab9a69a71606dae4f35fa33765a2 100644 (file)
@@ -293,7 +293,7 @@ brw_create_nir(struct brw_context *brw,
 
    if (brw->gen >= 6) {
       /* Try and fuse multiply-adds */
-      nir_opt_peephole_ffma(nir);
+      brw_nir_opt_peephole_ffma(nir);
       nir_validate_shader(nir);
    }
 
index b4a6dc0f8255090844d091de9701ee9e75440022..e7c93684fb3f07339439ddd94021c1376364bc80 100644 (file)
@@ -94,6 +94,8 @@ void brw_nir_setup_glsl_uniforms(nir_shader *shader,
 void brw_nir_setup_arb_uniforms(nir_shader *shader, struct gl_program *prog,
                                 struct brw_stage_prog_data *stage_prog_data);
 
+bool brw_nir_opt_peephole_ffma(nir_shader *shader);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
new file mode 100644 (file)
index 0000000..a8448e7
--- /dev/null
@@ -0,0 +1,268 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Jason Ekstrand (jason@jlekstrand.net)
+ *
+ */
+
+#include "brw_nir.h"
+
+/*
+ * Implements a small peephole optimization that looks for a multiply that
+ * is only ever used in an add and replaces both with an fma.
+ */
+
+struct peephole_ffma_state {
+   void *mem_ctx;
+   nir_function_impl *impl;
+   bool progress;
+};
+
+static inline bool
+are_all_uses_fadd(nir_ssa_def *def)
+{
+   if (!list_empty(&def->if_uses))
+      return false;
+
+   nir_foreach_use(def, use_src) {
+      nir_instr *use_instr = use_src->parent_instr;
+
+      if (use_instr->type != nir_instr_type_alu)
+         return false;
+
+      nir_alu_instr *use_alu = nir_instr_as_alu(use_instr);
+      switch (use_alu->op) {
+      case nir_op_fadd:
+         break; /* This one's ok */
+
+      case nir_op_imov:
+      case nir_op_fmov:
+      case nir_op_fneg:
+      case nir_op_fabs:
+         assert(use_alu->dest.dest.is_ssa);
+         if (!are_all_uses_fadd(&use_alu->dest.dest.ssa))
+            return false;
+         break;
+
+      default:
+         return false;
+      }
+   }
+
+   return true;
+}
+
+static nir_alu_instr *
+get_mul_for_src(nir_alu_src *src, int num_components,
+                uint8_t swizzle[4], bool *negate, bool *abs)
+{
+   uint8_t swizzle_tmp[4];
+   assert(src->src.is_ssa && !src->abs && !src->negate);
+
+   nir_instr *instr = src->src.ssa->parent_instr;
+   if (instr->type != nir_instr_type_alu)
+      return NULL;
+
+   nir_alu_instr *alu = nir_instr_as_alu(instr);
+   switch (alu->op) {
+   case nir_op_imov:
+   case nir_op_fmov:
+      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
+      break;
+
+   case nir_op_fneg:
+      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
+      *negate = !*negate;
+      break;
+
+   case nir_op_fabs:
+      alu = get_mul_for_src(&alu->src[0], num_components, swizzle, negate, abs);
+      *negate = false;
+      *abs = true;
+      break;
+
+   case nir_op_fmul:
+      /* Only absorb a fmul into a ffma if the fmul is is only used in fadd
+       * operations.  This prevents us from being too aggressive with our
+       * fusing which can actually lead to more instructions.
+       */
+      if (!are_all_uses_fadd(&alu->dest.dest.ssa))
+         return NULL;
+      break;
+
+   default:
+      return NULL;
+   }
+
+   if (!alu)
+      return NULL;
+
+   /* Copy swizzle data before overwriting it to avoid setting a wrong swizzle.
+    *
+    * Example:
+    *   Former swizzle[] = xyzw
+    *   src->swizzle[] = zyxx
+    *
+    *   Expected output swizzle = zyxx
+    *   If we reuse swizzle in the loop, then output swizzle would be zyzz.
+    */
+   memcpy(swizzle_tmp, swizzle, 4*sizeof(uint8_t));
+   for (int i = 0; i < num_components; i++)
+      swizzle[i] = swizzle_tmp[src->swizzle[i]];
+
+   return alu;
+}
+
+static bool
+brw_nir_opt_peephole_ffma_block(nir_block *block, void *void_state)
+{
+   struct peephole_ffma_state *state = void_state;
+
+   nir_foreach_instr_safe(block, instr) {
+      if (instr->type != nir_instr_type_alu)
+         continue;
+
+      nir_alu_instr *add = nir_instr_as_alu(instr);
+      if (add->op != nir_op_fadd)
+         continue;
+
+      /* TODO: Maybe bail if this expression is considered "precise"? */
+
+      assert(add->src[0].src.is_ssa && add->src[1].src.is_ssa);
+
+      /* This, is the case a + a.  We would rather handle this with an
+       * algebraic reduction than fuse it.  Also, we want to only fuse
+       * things where the multiply is used only once and, in this case,
+       * it would be used twice by the same instruction.
+       */
+      if (add->src[0].src.ssa == add->src[1].src.ssa)
+         continue;
+
+      nir_alu_instr *mul;
+      uint8_t add_mul_src, swizzle[4];
+      bool negate, abs;
+      for (add_mul_src = 0; add_mul_src < 2; add_mul_src++) {
+         for (unsigned i = 0; i < 4; i++)
+            swizzle[i] = i;
+
+         negate = false;
+         abs = false;
+
+         mul = get_mul_for_src(&add->src[add_mul_src],
+                               add->dest.dest.ssa.num_components,
+                               swizzle, &negate, &abs);
+
+         if (mul != NULL)
+            break;
+      }
+
+      if (mul == NULL)
+         continue;
+
+      nir_ssa_def *mul_src[2];
+      mul_src[0] = mul->src[0].src.ssa;
+      mul_src[1] = mul->src[1].src.ssa;
+
+      if (abs) {
+         for (unsigned i = 0; i < 2; i++) {
+            nir_alu_instr *abs = nir_alu_instr_create(state->mem_ctx,
+                                                      nir_op_fabs);
+            abs->src[0].src = nir_src_for_ssa(mul_src[i]);
+            nir_ssa_dest_init(&abs->instr, &abs->dest.dest,
+                              mul_src[i]->num_components, NULL);
+            abs->dest.write_mask = (1 << mul_src[i]->num_components) - 1;
+            nir_instr_insert_before(&add->instr, &abs->instr);
+            mul_src[i] = &abs->dest.dest.ssa;
+         }
+      }
+
+      if (negate) {
+         nir_alu_instr *neg = nir_alu_instr_create(state->mem_ctx,
+                                                   nir_op_fneg);
+         neg->src[0].src = nir_src_for_ssa(mul_src[0]);
+         nir_ssa_dest_init(&neg->instr, &neg->dest.dest,
+                           mul_src[0]->num_components, NULL);
+         neg->dest.write_mask = (1 << mul_src[0]->num_components) - 1;
+         nir_instr_insert_before(&add->instr, &neg->instr);
+         mul_src[0] = &neg->dest.dest.ssa;
+      }
+
+      nir_alu_instr *ffma = nir_alu_instr_create(state->mem_ctx, nir_op_ffma);
+      ffma->dest.saturate = add->dest.saturate;
+      ffma->dest.write_mask = add->dest.write_mask;
+
+      for (unsigned i = 0; i < 2; i++) {
+         ffma->src[i].src = nir_src_for_ssa(mul_src[i]);
+         for (unsigned j = 0; j < add->dest.dest.ssa.num_components; j++)
+            ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];
+      }
+      nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src], ffma);
+
+      assert(add->dest.dest.is_ssa);
+
+      nir_ssa_dest_init(&ffma->instr, &ffma->dest.dest,
+                        add->dest.dest.ssa.num_components,
+                        add->dest.dest.ssa.name);
+      nir_ssa_def_rewrite_uses(&add->dest.dest.ssa,
+                               nir_src_for_ssa(&ffma->dest.dest.ssa));
+
+      nir_instr_insert_before(&add->instr, &ffma->instr);
+      assert(list_empty(&add->dest.dest.ssa.uses));
+      nir_instr_remove(&add->instr);
+
+      state->progress = true;
+   }
+
+   return true;
+}
+
+static bool
+brw_nir_opt_peephole_ffma_impl(nir_function_impl *impl)
+{
+   struct peephole_ffma_state state;
+
+   state.mem_ctx = ralloc_parent(impl);
+   state.impl = impl;
+   state.progress = false;
+
+   nir_foreach_block(impl, brw_nir_opt_peephole_ffma_block, &state);
+
+   if (state.progress)
+      nir_metadata_preserve(impl, nir_metadata_block_index |
+                                  nir_metadata_dominance);
+
+   return state.progress;
+}
+
+bool
+brw_nir_opt_peephole_ffma(nir_shader *shader)
+{
+   bool progress = false;
+
+   nir_foreach_overload(shader, overload) {
+      if (overload->impl)
+         progress |= brw_nir_opt_peephole_ffma_impl(overload->impl);
+   }
+
+   return progress;
+}